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From: Roger Quadros <rogerq@ti.com>
To: <t-kristo@ti.com>
Cc: <robh@kernel.org>, <kishon@ti.com>, <nm@ti.com>, <nsekhar@ti.com>,
	<vigneshr@ti.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, Roger Quadros <rogerq@ti.com>
Subject: [PATCH v2 5/6] arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
Date: Tue, 3 Mar 2020 12:17:21 +0200	[thread overview]
Message-ID: <20200303101722.26052-6-rogerq@ti.com> (raw)
In-Reply-To: <20200303101722.26052-1-rogerq@ti.com>

USB0 supports super-speed mode on the EVM. Enable that.
On the EVM, USB0 uses SERDES3 for super-speed lane.

Since USB0 is a type-C port, it needs to support lane swapping
for cable flip support. This is provided using SERDES lane
swap feature. Provide the Type-C cable orientation GPIO
to the SERDES Wrapper driver.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 .../dts/ti/k3-j721e-common-proc-board.dts     | 32 +++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 7a5c3d4adadd..f057322b8c11 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -59,6 +59,7 @@
 	main_usbss0_pins_default: main_usbss0_pins_default {
 		pinctrl-single,pins = <
 			J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
+			J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
 		>;
 	};
 
@@ -310,16 +311,43 @@
 	status = "disabled";
 };
 
+&usb_serdes_mux {
+	idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
+};
+
+&serdes_ln_ctrl {
+	idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
+		      <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
+		      <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
+		      <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
+		      <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
+};
+
+&serdes_wiz3 {
+	typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
+};
+
+&serdes3 {
+	serdes3_usb_link: link@0 {
+		reg = <0>;
+		cdns,num-lanes = <2>;
+		#phy-cells = <0>;
+		cdns,phy-type = <PHY_TYPE_USB3>;
+		resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
+	};
+};
+
 &usbss0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_usbss0_pins_default>;
-	ti,usb2-only;
 	ti,vbus-divider;
 };
 
 &usb0 {
 	dr_mode = "otg";
-	maximum-speed = "high-speed";
+	maximum-speed = "super-speed";
+	phys = <&serdes3_usb_link>;
+	phy-names = "cdns3,usb3-phy";
 };
 
 &usbss1 {
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


  parent reply	other threads:[~2020-03-03 10:17 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-03 10:17 [PATCH v2 0/6] arm64: ti: k3-j721e: Add SERDES PHY and USB3.0 support Roger Quadros
2020-03-03 10:17 ` [PATCH v2 1/6] dt-bindings: syscon: Add TI's J721E specific compatible string Roger Quadros
2020-03-03 10:17 ` [PATCH v2 2/6] arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes Roger Quadros
2020-03-03 10:17 ` [PATCH v2 3/6] arm64: dts: ti: k3-j721e-main: Add serdes_ln_ctrl node to select SERDES lane mux Roger Quadros
2020-03-10 21:09   ` Rob Herring
2020-03-19 11:37     ` Kishon Vijay Abraham I
2020-04-23  7:03       ` Roger Quadros
2020-04-24 20:15       ` Rob Herring
2020-03-03 10:17 ` [PATCH v2 4/6] arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX Roger Quadros
2020-03-03 10:17 ` Roger Quadros [this message]
2020-03-03 10:17 ` [PATCH v2 6/6] arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line Roger Quadros

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