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From: Tony Lindgren <tony@atomide.com>
To: Roger Quadros <rogerq@ti.com>
Cc: Robin Murphy <robin.murphy@arm.com>, Nishanth Menon <nm@ti.com>,
	yan-liu@ti.com, linux-omap@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Christoph Hellwig <hch@lst.de>, Rob Herring <robh+dt@kernel.org>,
	"Nori, Sekhar" <nsekhar@ti.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>
Subject: Re: [PATCH] dra7: sata: Fix SATA with CONFIG_ARM_LPAE enabled
Date: Fri, 6 Mar 2020 07:08:37 -0800	[thread overview]
Message-ID: <20200306150837.GB37466@atomide.com> (raw)
In-Reply-To: <eb4e97f2-9afd-41a9-e239-88798c326a86@ti.com>

* Roger Quadros <rogerq@ti.com> [200305 16:47]:
> +Nishanth
> 
> Robin,
> 
> On 05/03/2020 18:04, Robin Murphy wrote:
> > On 04/03/2020 9:00 am, Roger Quadros wrote:
> > > Even though the TRM says that SATA IP has 36 address bits
> > > wired in the SoC, we see bus errors whenever any address
> > > greater than 32-bit is given to the controller.
> > 
> > Actually, is it really just SATA? I pulled up a couple of DRA7xx TRMs out of curiosity - thanks for having such easy-to-access documentation by the way :) - and they both give me a clear impression that the entire L3_MAIN interconnect is limited to 32-bit addresses and thus pretty much all the DMA masters should only be able to touch the lower 2GB of DRAM. Especially the bit that explicitly says "This is a high address range (Q8 – Q15) that requires an address greater than 32 bits. This space is visible only for the MPU Subsystem."
> 
> You are right that L3 interconnect can only access first 2GB of DRAM.
> Which means we should add the bus_dma_limit to the entire L3 bus
> instead of just SATA?

OK makes sense to me.

> > Is it in fact the case that the SATA driver happens to be the only one to set a >32-bit DMA mask on your system?
> 
> This looks like the case. Other device drivers might not be overriding
> dma_mask at all thus using the default 32-bit dma_mask.

OK

Regards,

Tony

      reply	other threads:[~2020-03-06 15:08 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04  9:00 Roger Quadros
2020-03-04 16:20 ` Tony Lindgren
2020-03-05 12:05   ` Roger Quadros
2020-03-05 12:30     ` Robin Murphy
2020-03-05 15:16       ` Christoph Hellwig
2020-03-05 16:04 ` Robin Murphy
2020-03-05 16:46   ` Roger Quadros
2020-03-06 15:08     ` Tony Lindgren [this message]

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