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From: Anand Moon <linux.amoon@gmail.com>
To: linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>, Kukjin Kim <kgene@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Felipe Balbi <balbi@kernel.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Subject: [PATCHv3 4/5] usb: dwc3: exynos: Add support for Exynos5422 suspend clk
Date: Tue, 10 Mar 2020 19:48:53 +0000	[thread overview]
Message-ID: <20200310194854.831-5-linux.amoon@gmail.com> (raw)
In-Reply-To: <20200310194854.831-1-linux.amoon@gmail.com>

Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300
so add missing code to enable/disable code and suspend clk, for this
add a new compatible samsung,exynos5420-dwusb3 to help configure
dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power
change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 90bb022737da..48b68b6f0dc8 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
 	.suspend_clk_idx = -1,
 };
 
+static const struct dwc3_exynos_driverdata exynos5420_drvdata = {
+	.clk_names = { "usbdrd30", "usbdrd30_susp_clk"},
+	.num_clks = 2,
+	.suspend_clk_idx = 1,
+};
+
 static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
 	.clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
 	.num_clks = 4,
@@ -178,6 +184,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
 	{
 		.compatible = "samsung,exynos5250-dwusb3",
 		.data = &exynos5250_drvdata,
+	}, {
+		.compatible = "samsung,exynos5420-dwusb3",
+		.data = &exynos5420_drvdata,
 	}, {
 		.compatible = "samsung,exynos5433-dwusb3",
 		.data = &exynos5433_drvdata,
-- 
2.25.1


  parent reply	other threads:[~2020-03-10 19:49 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-10 19:48 [PATCHv3 0/5] Add support for FSYS power domain and enable suspend clk for Exynos542x SoC Anand Moon
2020-03-10 19:48 ` [PATCHv3 1/5] devicetree: bindings: exynos: Add new compatible for Exynos5420 dwc3 clocks support Anand Moon
2020-03-15  9:07   ` Felipe Balbi
2020-03-15  9:25     ` Anand Moon
2020-03-17  8:42     ` Krzysztof Kozlowski
2020-03-10 19:48 ` [PATCHv3 2/5] ARM: dts: exynos: Add missing usbdrd3 suspend clk Anand Moon
2020-03-14 13:32   ` Anand Moon
2020-03-14 18:20     ` Krzysztof Kozlowski
2020-03-15  9:46       ` Anand Moon
2020-03-10 19:48 ` [PATCHv3 3/5] ARM: dts: exynos: Add FSYS power domain to Exynos542x USB nodes Anand Moon
2020-03-10 19:48 ` Anand Moon [this message]
2020-03-10 19:48 ` [PATCHv3 5/5] clk: samsung: exynos542x: Move FSYS subsystem clocks to its sub-CMU Anand Moon
2020-03-11 14:42   ` Krzysztof Kozlowski
2020-03-12 10:34     ` Anand Moon
2020-03-12 11:36       ` Krzysztof Kozlowski
2020-03-12 12:54         ` Anand Moon
2020-03-12 14:08           ` Anand Moon
2020-03-14 17:41             ` Krzysztof Kozlowski

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