LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Robert Foss <robert.foss@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org,
	olof@lixom.net, Anson.Huang@nxp.com, maxime@cerno.tech,
	leonard.crestez@nxp.com, dinguyen@kernel.org,
	marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Loic Poulain <loic.poulain@linaro.org>
Cc: Robert Foss <robert.foss@linaro.org>
Subject: [v1 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes
Date: Wed, 11 Mar 2020 13:35:00 +0100	[thread overview]
Message-ID: <20200311123501.18202-6-robert.foss@linaro.org> (raw)
In-Reply-To: <20200311123501.18202-1-robert.foss@linaro.org>

Enable the ov8856 main camera and the ov7251 b/w tracking camera
used on the Qualcomm RB3 kit.

Currently the camera nodes have not yet been attached to an to a
CSI2 endpoint, since no driver currently supports the ISP that the the
SDM845/db845c ships with.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 239 +++++++++++++++++++++
 1 file changed, 239 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index e8c056d02ace..660550197ce9 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -110,6 +110,53 @@
 		// enable-active-high;
 	};
 
+	cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+		compatible = "regulator-fixed";
+		regulator-name = "CAM0_DVDD_1V2";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		enable-active-high;
+		gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
+		vin-supply = <&vbat>;
+	};
+
+	cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "CAM0_AVDD_2V8";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		enable-active-high;
+		gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cam0_avdd_2v8_en_default>;
+		vin-supply = <&vbat>;
+	};
+
+	/* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
+	cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "CAM3_AVDD_2V8";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		regulator-always-on;
+		vin-supply = <&vbat>;
+	};
+
+	/* This regulator does not really exits, but a 'vddd-supply' is
+	 * required for the ov7251 driver, but no 'vddd' regulator is used
+	 * in the schematic
+	 */
+	cam3_vddd_1v2: reg_cam3_vddd_1v2 {
+		compatible = "regulator-fixed";
+		regulator-name = "CAM3_VDDD_1V2_DUMMY";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-always-on;
+		vin-supply = <&vbat>;
+	};
+
 	pcie0_3p3v_dual: vldo-3v3-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "VLDO_3V3";
@@ -406,6 +453,81 @@
 };
 
 &tlmm {
+	pcie0_default_state: pcie0-default {
+		clkreq {
+			pins = "gpio36";
+			function = "pci_e0";
+			bias-pull-up;
+		};
+
+		reset-n {
+			pins = "gpio35";
+			function = "gpio";
+
+			drive-strength = <2>;
+			output-low;
+			bias-pull-down;
+		};
+
+		wake-n {
+			pins = "gpio37";
+			function = "gpio";
+
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
+	cam0_default: cam0_default {
+		mux_rst {
+			function = "gpio";
+			pins = "gpio9";
+		};
+		config_rst {
+			pins = "gpio9";
+			drive-strength = <16>;
+			bias-disable;
+		};
+
+		mux_mclk0 {
+			function = "cam_mclk";
+			pins = "gpio13";
+		};
+		config_mclk0 {
+			pins = "gpio13";
+			drive-strength = <16>;
+			bias-disable;
+		};
+	};
+
+	cam3_default: cam3_default {
+			mux_rst {
+				function = "gpio";
+				pins = "gpio21";
+			};
+			config_rst {
+				pins = "gpio21";
+				drive-strength = <16>;
+				bias-disable;
+			};
+
+			mux_mclk3 {
+				function = "cam_mclk";
+				pins = "gpio16";
+			};
+			config_mclk3 {
+				pins = "gpio16";
+				drive-strength = <16>;
+				bias-disable;
+			};
+	};
+
+	lt9611_irq_pin: lt9611-irq {
+		pins = "gpio84";
+		function = "gpio";
+		bias-disable;
+	};
+
 	pcie0_pwren_state: pcie0-pwren {
 		pins = "gpio90";
 		function = "gpio";
@@ -612,8 +734,125 @@
 		"PM845_GPIO24",
 		"OPTION2",
 		"PM845_SLB";
+
+	cam0_dvdd_1v2_en_default: cam0_dvdd_1v2_en_pinctrl {
+		pins = "gpio12";
+		function = "normal";
+
+		bias-pull-up;
+		drive-push-pull;
+		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+	};
+
+	cam0_avdd_2v8_en_default: cam0_avdd_2v8_en_pinctrl {
+		pins = "gpio10";
+		function = "normal";
+
+		bias-pull-up;
+		drive-push-pull;
+		qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+	};
 };
 
 &cci {
 	status = "ok";
+
+	i2c-bus@0 {
+		cam0@10 {
+			compatible = "ovti,ov8856";
+
+			/* The Qualcomm RB3 camera mezzanine schematic lists
+			 * 0x20 as I2C address of this device, but the Linux
+			 * kernel documentation lists 0x10 I2C address.
+			 */
+			reg = <0x10>;
+
+			// CAM0_RST_N
+			reset-gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam0_default>;
+			gpios = <&tlmm 13 0>,
+				<&tlmm 9 0>;
+
+			clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+			clock-names = "xvclk";
+			clock-frequency = <19200000>;
+
+
+			/* The &vreg_s4a_1p8 trace is powered on as a
+			 * part of the TITAN_TOP_GDSC power domain.
+			 * So it is represented by a fixed regulator.
+			 *
+			 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
+			 * both have to be enabled through the power management
+			 * gpios.
+			 */
+			power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+			dovdd-supply = <&vreg_lvs1a_1p8>;
+			avdd-supply = <&cam0_avdd_2v8>;
+			dvdd-supply = <&cam0_dvdd_1v2>;
+
+			/* No camera mezzanine by default */
+			status = "ok";
+
+			port {
+				ov8856_ep: endpoint {
+					clock-lanes = <1>;
+					link-frequencies = /bits/ 64
+						<360000000 180000000>;
+					data-lanes = <1 2 3 4>;
+//					remote-endpoint = <&csiphy0_ep>;
+				};
+			};
+		};
+	};
+
+	i2c-bus@1 {
+		cam3@60 {
+			compatible = "ovti,ov7251";
+
+			// I2C address as per ov7251.txt linux documentation
+			reg = <0x60>;
+
+			// CAM3_RST_N
+			enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam3_default>;
+			gpios = <&tlmm 16 0>,
+				<&tlmm 21 0>;
+
+			clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+			clock-names = "xclk";
+			clock-frequency = <24000000>;
+
+			/* The &vreg_s4a_1p8 trace is powered on as a
+			 * part of the TITAN_TOP_GDSC power domain.
+			 * So it is represented by a fixed regulator.
+			 *
+			 * The 2.8V vdda-supply regulator is enabled when the
+			 * vreg_s4a_1p8 trace is pulled high.
+			 * It too is represented by a fixed regulator.
+			 *
+			 * No 1.2V vddd-supply regulator is used, a fixed
+			 * regulator represents it.
+			 */
+			power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+			vdddo-supply = <&vreg_lvs1a_1p8>;
+			vdda-supply = <&cam3_avdd_2v8>;
+			vddd-supply = <&cam3_vddd_1v2>;
+
+			/* No camera mezzanine by default */
+			status = "ok";
+
+			port {
+				ov7251_ep: endpoint {
+					clock-lanes = <1>;
+					data-lanes = <0 1>;
+//					remote-endpoint = <&csiphy3_ep>;
+				};
+			};
+		};
+	};
 };
-- 
2.20.1


  parent reply	other threads:[~2020-03-11 12:35 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-11 12:34 [v1 0/6] Qualcomm CCI & Camera for db410c & db845c Robert Foss
2020-03-11 12:34 ` [v1 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node Robert Foss
2020-03-12  4:50   ` Bjorn Andersson
2020-03-11 12:34 ` [v1 2/6] arm64: dts: apq8016-sbc: Add CCI/Sensor nodes Robert Foss
2020-03-12  5:03   ` Bjorn Andersson
2020-03-11 12:34 ` [v1 3/6] arm64: dts: sdm845: Add i2c-qcom-cci node Robert Foss
2020-03-12  5:12   ` Bjorn Andersson
2020-03-11 12:34 ` [v1 4/6] arm64: dts: sdm845-db845c: Add pm_8998 gpio names Robert Foss
2020-03-12  5:13   ` Bjorn Andersson
2020-03-11 12:35 ` Robert Foss [this message]
2020-03-12  5:34   ` [v1 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes Bjorn Andersson
2020-03-11 12:35 ` [v1 6/6] arm64: defconfig: Enable QCOM CAMCC, CAMSS and CCI drivers Robert Foss
2020-03-12  5:35   ` Bjorn Andersson
2020-03-17 13:54     ` Robert Foss

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200311123501.18202-6-robert.foss@linaro.org \
    --to=robert.foss@linaro.org \
    --cc=Anson.Huang@nxp.com \
    --cc=agross@kernel.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=leonard.crestez@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=loic.poulain@linaro.org \
    --cc=marcin.juszkiewicz@linaro.org \
    --cc=mark.rutland@arm.com \
    --cc=maxime@cerno.tech \
    --cc=olof@lixom.net \
    --cc=robh+dt@kernel.org \
    --cc=shawnguo@kernel.org \
    --cc=will@kernel.org \
    --subject='Re: [v1 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).