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From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>
Cc: Alexander Graf <graf@amazon.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <damien.lemoal@wdc.com>,
Christoph Hellwig <hch@lst.de>, Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v11 01/20] RISC-V: Export riscv_cpuid_to_hartid_mask() API
Date: Fri, 13 Mar 2020 13:21:12 +0530 [thread overview]
Message-ID: <20200313075131.69837-2-anup.patel@wdc.com> (raw)
In-Reply-To: <20200313075131.69837-1-anup.patel@wdc.com>
The riscv_cpuid_to_hartid_mask() API should be exported to allow
building KVM RISC-V as loadable module.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/kernel/smp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index eb878abcaaf8..6fc7828d41e4 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -10,6 +10,7 @@
#include <linux/cpu.h>
#include <linux/interrupt.h>
+#include <linux/module.h>
#include <linux/profile.h>
#include <linux/smp.h>
#include <linux/sched.h>
@@ -63,6 +64,7 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
for_each_cpu(cpu, in)
cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
}
+EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
{
--
2.17.1
next prev parent reply other threads:[~2020-03-13 7:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 7:51 [PATCH v11 00/20] KVM RISC-V Support Anup Patel
2020-03-13 7:51 ` Anup Patel [this message]
2020-03-13 7:51 ` [PATCH v11 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2020-03-13 7:51 ` [PATCH v11 03/20] RISC-V: Remove N-extension related defines Anup Patel
2020-03-13 7:51 ` [PATCH v11 04/20] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2020-03-13 7:51 ` [PATCH v11 05/20] RISC-V: Add initial skeletal KVM support Anup Patel
2020-03-13 7:51 ` [PATCH v11 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2020-03-13 7:51 ` [PATCH v11 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2020-03-13 7:51 ` [PATCH v11 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2020-03-13 7:51 ` [PATCH v11 09/20] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2020-03-13 7:51 ` [PATCH v11 10/20] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2020-03-13 7:51 ` [PATCH v11 11/20] RISC-V: KVM: Handle WFI " Anup Patel
2020-03-13 7:51 ` [PATCH v11 12/20] RISC-V: KVM: Implement VMID allocator Anup Patel
2020-03-13 7:51 ` [PATCH v11 13/20] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2020-03-13 7:51 ` [PATCH v11 14/20] RISC-V: KVM: Implement MMU notifiers Anup Patel
2020-03-13 7:51 ` [PATCH v11 15/20] RISC-V: KVM: Add timer functionality Anup Patel
2020-03-13 7:51 ` [PATCH v11 16/20] RISC-V: KVM: FP lazy save/restore Anup Patel
2020-03-13 7:51 ` [PATCH v11 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2020-03-13 7:51 ` [PATCH v11 18/20] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2020-03-13 7:51 ` [PATCH v11 19/20] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2020-03-13 7:51 ` [PATCH v11 20/20] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2020-04-17 12:45 ` [PATCH v11 00/20] KVM RISC-V Support Anup Patel
2020-04-23 15:43 ` Palmer Dabbelt
2020-04-24 5:03 ` Anup Patel
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