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From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>
Cc: Alexander Graf <graf@amazon.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Damien Le Moal <damien.lemoal@wdc.com>,
	Christoph Hellwig <hch@lst.de>, Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v11 03/20] RISC-V: Remove N-extension related defines
Date: Fri, 13 Mar 2020 13:21:14 +0530	[thread overview]
Message-ID: <20200313075131.69837-4-anup.patel@wdc.com> (raw)
In-Reply-To: <20200313075131.69837-1-anup.patel@wdc.com>

The RISC-V N-extension is still in draft state hence remove
N-extension related defines from asm/csr.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/include/asm/csr.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 8e18d2c64399..cec462e198ce 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -51,13 +51,10 @@
 #define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))
 
 /* Interrupt causes (minus the high bit) */
-#define IRQ_U_SOFT		0
 #define IRQ_S_SOFT		1
 #define IRQ_M_SOFT		3
-#define IRQ_U_TIMER		4
 #define IRQ_S_TIMER		5
 #define IRQ_M_TIMER		7
-#define IRQ_U_EXT		8
 #define IRQ_S_EXT		9
 #define IRQ_M_EXT		11
 
-- 
2.17.1


  parent reply	other threads:[~2020-03-13  7:54 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13  7:51 [PATCH v11 00/20] KVM RISC-V Support Anup Patel
2020-03-13  7:51 ` [PATCH v11 01/20] RISC-V: Export riscv_cpuid_to_hartid_mask() API Anup Patel
2020-03-13  7:51 ` [PATCH v11 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2020-03-13  7:51 ` Anup Patel [this message]
2020-03-13  7:51 ` [PATCH v11 04/20] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2020-03-13  7:51 ` [PATCH v11 05/20] RISC-V: Add initial skeletal KVM support Anup Patel
2020-03-13  7:51 ` [PATCH v11 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2020-03-13  7:51 ` [PATCH v11 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2020-03-13  7:51 ` [PATCH v11 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2020-03-13  7:51 ` [PATCH v11 09/20] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2020-03-13  7:51 ` [PATCH v11 10/20] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2020-03-13  7:51 ` [PATCH v11 11/20] RISC-V: KVM: Handle WFI " Anup Patel
2020-03-13  7:51 ` [PATCH v11 12/20] RISC-V: KVM: Implement VMID allocator Anup Patel
2020-03-13  7:51 ` [PATCH v11 13/20] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2020-03-13  7:51 ` [PATCH v11 14/20] RISC-V: KVM: Implement MMU notifiers Anup Patel
2020-03-13  7:51 ` [PATCH v11 15/20] RISC-V: KVM: Add timer functionality Anup Patel
2020-03-13  7:51 ` [PATCH v11 16/20] RISC-V: KVM: FP lazy save/restore Anup Patel
2020-03-13  7:51 ` [PATCH v11 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2020-03-13  7:51 ` [PATCH v11 18/20] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2020-03-13  7:51 ` [PATCH v11 19/20] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2020-03-13  7:51 ` [PATCH v11 20/20] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2020-04-17 12:45 ` [PATCH v11 00/20] KVM RISC-V Support Anup Patel
2020-04-23 15:43   ` Palmer Dabbelt
2020-04-24  5:03     ` Anup Patel

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