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From: Rob Clark <robdclark@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: Jordan Crouse <jordan@cosmicpenguin.net>,
	Rob Clark <robdclark@chromium.org>,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@somainline.org>,
	Dave Airlie <airlied@redhat.com>,
	Douglas Anderson <dianders@chromium.org>,
	Eric Anholt <eric@anholt.net>,
	freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM
	ADRENO GPU), Jonathan Marek <jonathan@marek.ca>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	"Kristian H. Kristensen" <hoegsberg@google.com>,
	linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM
	ADRENO GPU), linux-kernel@vger.kernel.org (open list),
	Marijn Suijten <marijn.suijten@somainline.org>,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Sharat Masetty <smasetty@codeaurora.org>
Subject: [PATCH 0/2] drm/msm: Smooth out ringbuffer-full handling
Date: Wed, 28 Apr 2021 12:36:47 -0700	[thread overview]
Message-ID: <20210428193654.1498482-1-robdclark@gmail.com> (raw)

From: Rob Clark <robdclark@chromium.org>

With some recent userspace work to allow more rendering to be merged
into a single SUBMIT ioctl, I realized we have some sharp edges around
running out of free ringbuffer space.

1) Currently we only flush once all the cmds (or rather IBs to the cmd
   buffer) are written into the ringbuffer.  Which places a restriction
   that the submit must fit in the rb.  Which means slightly less than
   2k cmds per submit, after accounting for some of the other packets
   needed.
2) Currently, for devices that use RPTR shadow, we only write the
   CP_WHERE_AM_I packet at the end of the submit, so we aren't seeing
   partial progress that the GPU is making chewing through previous
   large submits
3) We spin for up to 1sec waiting for rb space, and then give up and
   proceed to overwrite the packets that that CP is currently chewing
   on.. which goes badly.  If userspace is submitting >1sec of work
   per submit ioctl, this means we spin for a long time, and then
   corrupt the rb anyways.

This patchset doesn't completely address #1.  And in general we don't
want to be uninteruptably blocking for so much time.. but this will
require some more extensive changes.

What it does do is address #2 by periodically emitting a CP_WHERE_AM_I,
and #3 by adding detection and error handling for rb overflow, returning
-ENOSPC when that happens.

Rob Clark (2):
  drm/msm: Handle ringbuffer overflow
  drm/msm: Periodically update RPTR shadow

 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 32 ++++++++++++++++++++----
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 30 +++++++++++++++++-----
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 24 +++++++++++++++++-
 drivers/gpu/drm/msm/msm_gem_submit.c    |  7 +++++-
 drivers/gpu/drm/msm/msm_gpu.c           | 33 +++++++++++++++++++++++--
 drivers/gpu/drm/msm/msm_gpu.h           |  2 +-
 drivers/gpu/drm/msm/msm_ringbuffer.h    |  5 ++++
 7 files changed, 117 insertions(+), 16 deletions(-)

-- 
2.30.2


             reply	other threads:[~2021-04-28 19:33 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-28 19:36 Rob Clark [this message]
2021-04-28 19:36 ` [PATCH 1/2] drm/msm: Handle ringbuffer overflow Rob Clark
2021-11-25  7:36   ` Dmitry Baryshkov
2021-11-25 17:20     ` Rob Clark
2021-04-28 19:36 ` [PATCH 2/2] drm/msm: Periodically update RPTR shadow Rob Clark
2021-05-02 19:47   ` Jordan Crouse

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