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From: Mark Kettenis <mark.kettenis@xs4all.nl>
To: devicetree@vger.kernel.org
Cc: maz@kernel.org, robin.murphy@arm.com, sven@svenpeter.dev,
Mark Kettenis <kettenis@openbsd.org>,
Hector Martin <marcan@marcan.st>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 0/2] Apple M1 PCIe DT bindings
Date: Mon, 26 Jul 2021 10:31:59 +0200 [thread overview]
Message-ID: <20210726083204.93196-1-mark.kettenis@xs4all.nl> (raw)
From: Mark Kettenis <kettenis@openbsd.org>
This small series adds bindings for the PCIe controller found on the
Apple M1 SoC.
At this point, the primary consumer for these bindings is U-Boot.
With these bindings U-Boot can bring up the links for the root ports
of the PCIe root complex. A simple OS driver can then provide
standard ECAM access and manage MSI interrupts to provide access
to the built-in Ethernet and XHCI controllers of the Mac mini.
The Apple controller incorporates Synopsys Designware PCIe logic
to implement its root port. But unlike other hardware currently
supported by U-Boot and the Linux kernel the Apple hardware
integrates multiple root ports. As such the existing bindings
for the DWC PCIe interface can't be used. There is a single ECAM
space for all root space, but separate GPIOs to take the PCI devices
on those ports out of reset. Therefore the standard "reset-gpio" and
"max-link-speed" properties appear on the child nodes representing
the PCI devices that correspond to the individual root ports.
MSIs are handled by the PCIe controller and translated into "regular
interrupts". A range of 32 MSIs is provided. These 32 MSIs can be
distributed over the root ports as the OS sees fit by programming the
PCIe controller port registers.
I still hope to hear from Marc Zyngier on the way MSIs are represented
in this binding.
Patch 2/2 of this series depends on the pinctrl series I sent earlier
and will probably go through Hector Martin's Apple M1 SoC tree.
Changelog:
v3: - Remove unneeded include in example
v2: - Adjust name for ECAM in "reg-names"
- Drop "phy" registers
- Expand description
- Add description for "interrupts"
- Fix incorrect minItems for "interrupts"
- Fix incorrect MaxItems for "reg-names"
- Document the use of "msi-controller", "msi-parent", "iommu-map" and
"iommu-map-mask"
- Fix "bus-range" and "iommu-map" properties in the example
Mark Kettenis (2):
dt-bindings: pci: Add DT bindings for apple,pcie
arm64: apple: Add PCIe node
.../devicetree/bindings/pci/apple,pcie.yaml | 166 ++++++++++++++++++
MAINTAINERS | 1 +
arch/arm64/boot/dts/apple/t8103.dtsi | 63 +++++++
3 files changed, 230 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml
--
2.32.0
next reply other threads:[~2021-07-26 8:39 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 8:31 Mark Kettenis [this message]
2021-07-26 8:32 ` [PATCH v3 1/2] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
2021-07-26 23:18 ` Rob Herring
2021-07-31 9:44 ` Mark Kettenis
2021-08-01 9:31 ` Marc Zyngier
2021-08-02 16:10 ` Rob Herring
2021-08-15 16:36 ` Marc Zyngier
2021-08-15 19:19 ` Rob Herring
2021-08-18 19:56 ` Mark Kettenis
2021-08-18 20:51 ` Rob Herring
2021-08-22 17:44 ` Mark Kettenis
2021-08-23 15:24 ` Rob Herring
2021-07-26 8:32 ` [PATCH v3 2/2] arm64: apple: Add PCIe node Mark Kettenis
2021-07-26 10:05 ` [PATCH v3 0/2] Apple M1 PCIe DT bindings Marc Zyngier
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