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From: Chun-Jie Chen <chun-jie.chen@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	Chun-Jie Chen <chun-jie.chen@mediatek.com>
Subject: [v14 08/21] clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
Date: Mon, 26 Jul 2021 18:57:06 +0800	[thread overview]
Message-ID: <20210726105719.15793-9-chun-jie.chen@mediatek.com> (raw)
In-Reply-To: <20210726105719.15793-1-chun-jie.chen@mediatek.com>

Most of subsystem clock providers only need to register clock gates
in their probe() function.
To reduce the duplicated code by add a generic function.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
---
 drivers/clk/mediatek/clk-mtk.c | 23 +++++++++++++++++++++++
 drivers/clk/mediatek/clk-mtk.h |  8 ++++++++
 2 files changed, 31 insertions(+)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 37d2aa32175e..4b6096c44d74 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -13,6 +13,7 @@
 #include <linux/clkdev.h>
 #include <linux/mfd/syscon.h>
 #include <linux/device.h>
+#include <linux/of_device.h>
 
 #include "clk-mtk.h"
 #include "clk-gate.h"
@@ -286,3 +287,25 @@ void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
 			clk_data->clks[mcd->id] = clk;
 	}
 }
+
+int mtk_clk_simple_probe(struct platform_device *pdev)
+{
+	const struct mtk_clk_desc *mcd;
+	struct clk_onecell_data *clk_data;
+	struct device_node *node = pdev->dev.of_node;
+	int r;
+
+	mcd = of_device_get_match_data(&pdev->dev);
+	if (!mcd)
+		return -EINVAL;
+
+	clk_data = mtk_alloc_clk_data(mcd->num_clks);
+	if (!clk_data)
+		return -ENOMEM;
+
+	r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, clk_data);
+	if (r)
+		return r;
+
+	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+}
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 31c7cb304508..7de41c3b3206 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -10,6 +10,7 @@
 #include <linux/regmap.h>
 #include <linux/bitops.h>
 #include <linux/clk-provider.h>
+#include <linux/platform_device.h>
 
 struct clk;
 struct clk_onecell_data;
@@ -250,4 +251,11 @@ void mtk_register_reset_controller(struct device_node *np,
 void mtk_register_reset_controller_set_clr(struct device_node *np,
 	unsigned int num_regs, int regofs);
 
+struct mtk_clk_desc {
+	const struct mtk_gate *clks;
+	size_t num_clks;
+};
+
+int mtk_clk_simple_probe(struct platform_device *pdev);
+
 #endif /* __DRV_CLK_MTK_H */
-- 
2.18.0


  parent reply	other threads:[~2021-07-26 10:58 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-26 10:56 [v14 00/21] Mediatek MT8192 clock support Chun-Jie Chen
2021-07-26 10:56 ` [v14 01/21] dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock Chun-Jie Chen
2021-07-27 17:53   ` Stephen Boyd
2021-07-26 10:57 ` [v14 02/21] dt-bindings: ARM: Mediatek: Add mmsys document binding for MT8192 Chun-Jie Chen
2021-07-27 17:53   ` Stephen Boyd
2021-07-28  8:47     ` Enric Balletbo Serra
2021-07-28 10:21       ` Chun-Jie Chen
2021-08-03 20:17       ` Stephen Boyd
2021-08-05 15:35     ` Matthias Brugger
2021-08-05 23:49       ` Stephen Boyd
2021-07-26 10:57 ` [v14 03/21] dt-bindings: ARM: Mediatek: Add audsys " Chun-Jie Chen
2021-07-27 17:54   ` Stephen Boyd
2021-07-26 10:57 ` [v14 04/21] clk: mediatek: Add dt-bindings of MT8192 clocks Chun-Jie Chen
2021-07-27 17:54   ` Stephen Boyd
2021-07-26 10:57 ` [v14 05/21] clk: mediatek: Get regmap without syscon compatible check Chun-Jie Chen
2021-07-27  4:37   ` Ikjoon Jang
2021-07-27 17:54   ` Stephen Boyd
2021-07-26 10:57 ` [v14 06/21] clk: mediatek: Fix asymmetrical PLL enable and disable control Chun-Jie Chen
2021-07-27 17:54   ` Stephen Boyd
2021-07-26 10:57 ` [v14 07/21] clk: mediatek: Add configurable enable control to mtk_pll_data Chun-Jie Chen
2021-07-27 17:55   ` Stephen Boyd
2021-07-26 10:57 ` Chun-Jie Chen [this message]
2021-07-27  4:38   ` [v14 08/21] clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers Ikjoon Jang
2021-07-27 17:55   ` Stephen Boyd
2021-07-26 10:57 ` [v14 09/21] clk: mediatek: Add MT8192 basic clocks support Chun-Jie Chen
2021-07-27  4:39   ` Ikjoon Jang
2021-07-27 17:55   ` Stephen Boyd
2021-07-26 10:57 ` [v14 10/21] clk: mediatek: Add MT8192 audio clock support Chun-Jie Chen
2021-07-27  4:40   ` Ikjoon Jang
2021-07-27 17:55   ` Stephen Boyd
2021-07-26 10:57 ` [v14 11/21] clk: mediatek: Add MT8192 camsys " Chun-Jie Chen
2021-07-27  4:41   ` Ikjoon Jang
2021-07-27 17:55   ` Stephen Boyd
2021-07-26 10:57 ` [v14 12/21] clk: mediatek: Add MT8192 imgsys " Chun-Jie Chen
2021-07-27  4:41   ` Ikjoon Jang
2021-07-27 17:56   ` Stephen Boyd
2021-07-26 10:57 ` [v14 13/21] clk: mediatek: Add MT8192 imp i2c wrapper " Chun-Jie Chen
2021-07-27  4:42   ` Ikjoon Jang
2021-07-27 17:56   ` Stephen Boyd
2021-07-26 10:57 ` [v14 14/21] clk: mediatek: Add MT8192 ipesys " Chun-Jie Chen
2021-07-27  4:43   ` Ikjoon Jang
2021-07-27 17:56   ` Stephen Boyd
2021-07-26 10:57 ` [v14 15/21] clk: mediatek: Add MT8192 mdpsys " Chun-Jie Chen
2021-07-27  4:43   ` Ikjoon Jang
2021-07-27 17:56   ` Stephen Boyd
2021-07-26 10:57 ` [v14 16/21] clk: mediatek: Add MT8192 mfgcfg " Chun-Jie Chen
2021-07-27  4:44   ` Ikjoon Jang
2021-07-27 17:56   ` Stephen Boyd
2021-07-26 10:57 ` [v14 17/21] clk: mediatek: Add MT8192 mmsys " Chun-Jie Chen
2021-07-27 17:57   ` Stephen Boyd
2021-07-26 10:57 ` [v14 18/21] clk: mediatek: Add MT8192 msdc " Chun-Jie Chen
2021-07-27  4:45   ` Ikjoon Jang
2021-07-27 17:57   ` Stephen Boyd
2021-07-26 10:57 ` [v14 19/21] clk: mediatek: Add MT8192 scp adsp " Chun-Jie Chen
2021-07-27  4:46   ` Ikjoon Jang
2021-07-27 17:57   ` Stephen Boyd
2021-07-26 10:57 ` [v14 20/21] clk: mediatek: Add MT8192 vdecsys " Chun-Jie Chen
2021-07-27  4:47   ` Ikjoon Jang
2021-07-27 17:57   ` Stephen Boyd
2021-07-26 10:57 ` [v14 21/21] clk: mediatek: Add MT8192 vencsys " Chun-Jie Chen
2021-07-27  4:47   ` Ikjoon Jang
2021-07-27 17:57   ` Stephen Boyd

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