[PATCH] ASoC: qcom: apq8016_sbc: Add SEC_MI2S support

[PATCH] ASoC: qcom: apq8016_sbc: Add SEC_MI2S support

[Vincent Knecht]

This patch adds external codec support on secondary mi2s.
It is used for headphones on some devices, eg. alcatel-idol347.

Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
---
 sound/soc/qcom/apq8016_sbc.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c
index 08a05f0ecad7..53460272eb1e 100644
--- a/sound/soc/qcom/apq8016_sbc.c
+++ b/sound/soc/qcom/apq8016_sbc.c
@@ -30,6 +30,11 @@ struct apq8016_sbc_data {
 #define MIC_CTRL_QUA_WS_SLAVE_SEL_10	BIT(17)
 #define MIC_CTRL_TLMM_SCLK_EN		BIT(1)
 #define	SPKR_CTL_PRI_WS_SLAVE_SEL_11	(BIT(17) | BIT(16))
+#define SPKR_CTL_TLMM_MCLK_EN		BIT(1)
+#define SPKR_CTL_TLMM_SCLK_EN		BIT(2)
+#define SPKR_CTL_TLMM_DATA1_EN		BIT(3)
+#define SPKR_CTL_TLMM_WS_OUT_SEL	BIT(6)
+#define SPKR_CTL_TLMM_WS_EN_SEL		BIT(18)
 #define DEFAULT_MCLK_RATE		9600000
 
 static int apq8016_sbc_dai_init(struct snd_soc_pcm_runtime *rtd)
@@ -53,6 +58,13 @@ static int apq8016_sbc_dai_init(struct snd_soc_pcm_runtime *rtd)
 			MIC_CTRL_TLMM_SCLK_EN,
 			pdata->mic_iomux);
 		break;
+	case MI2S_SECONDARY:
+		/* Configure the Sec MI2S to TLMM */
+		writel(readl(pdata->spkr_iomux) | SPKR_CTL_TLMM_MCLK_EN |
+			SPKR_CTL_TLMM_SCLK_EN | SPKR_CTL_TLMM_DATA1_EN |
+			SPKR_CTL_TLMM_WS_OUT_SEL | SPKR_CTL_TLMM_WS_EN_SEL,
+			pdata->spkr_iomux);
+		break;
 	case MI2S_TERTIARY:
 		writel(readl(pdata->mic_iomux) | MIC_CTRL_TER_WS_SLAVE_SEL |
 			MIC_CTRL_TLMM_SCLK_EN,
-- 
2.31.1

Re: [PATCH] ASoC: qcom: apq8016_sbc: Add SEC_MI2S support

[Srinivas Kandagatla]

On 01/08/2021 08:29, Vincent Knecht wrote:
> This patch adds external codec support on secondary mi2s.
> It is used for headphones on some devices, eg. alcatel-idol347.
> 
> Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
> ---
>   sound/soc/qcom/apq8016_sbc.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c
> index 08a05f0ecad7..53460272eb1e 100644
> --- a/sound/soc/qcom/apq8016_sbc.c
> +++ b/sound/soc/qcom/apq8016_sbc.c
> @@ -30,6 +30,11 @@ struct apq8016_sbc_data {
>   #define MIC_CTRL_QUA_WS_SLAVE_SEL_10	BIT(17)
>   #define MIC_CTRL_TLMM_SCLK_EN		BIT(1)
>   #define	SPKR_CTL_PRI_WS_SLAVE_SEL_11	(BIT(17) | BIT(16))
> +#define SPKR_CTL_TLMM_MCLK_EN		BIT(1)
> +#define SPKR_CTL_TLMM_SCLK_EN		BIT(2)
> +#define SPKR_CTL_TLMM_DATA1_EN		BIT(3)
> +#define SPKR_CTL_TLMM_WS_OUT_SEL	BIT(6)
> +#define SPKR_CTL_TLMM_WS_EN_SEL		BIT(18)

Can you please add suffix to these defines something like:
#define SPKR_CTL_TLMM_WS_EN_SEL_SECONDARY	BIT(18)
so it becomes more obvious, As we have 4 possible values for this field 
[18:19]
same for WS_OUT_SEL.

Also you should make sure that other bits in this fields are cleared 
before writing.

--srini

>   #define DEFAULT_MCLK_RATE		9600000
>   
>   static int apq8016_sbc_dai_init(struct snd_soc_pcm_runtime *rtd)
> @@ -53,6 +58,13 @@ static int apq8016_sbc_dai_init(struct snd_soc_pcm_runtime *rtd)
>   			MIC_CTRL_TLMM_SCLK_EN,
>   			pdata->mic_iomux);
>   		break;
> +	case MI2S_SECONDARY:
> +		/* Configure the Sec MI2S to TLMM */
> +		writel(readl(pdata->spkr_iomux) | SPKR_CTL_TLMM_MCLK_EN |
> +			SPKR_CTL_TLMM_SCLK_EN | SPKR_CTL_TLMM_DATA1_EN |
> +			SPKR_CTL_TLMM_WS_OUT_SEL | SPKR_CTL_TLMM_WS_EN_SEL,
> +			pdata->spkr_iomux);
> +		break;
>   	case MI2S_TERTIARY:
>   		writel(readl(pdata->mic_iomux) | MIC_CTRL_TER_WS_SLAVE_SEL |
>   			MIC_CTRL_TLMM_SCLK_EN,
>