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From: Yassine Oudjana <y.oudjana@protonmail.com>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Georgi Djakov <djakov@kernel.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
	AngeloGioacchino Del Regno <kholk11@gmail.com>,
	linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 6/6] arm64: dts: qcom: msm8996: Add interconnect support
Date: Sun, 01 Aug 2021 15:25:40 +0000	[thread overview]
Message-ID: <20210801152427.475547-7-y.oudjana@protonmail.com> (raw)
In-Reply-To: <20210801152427.475547-1-y.oudjana@protonmail.com>

Add interconnect providers for the multiple NoCs available on the platform,
and assign interconnects used by some blocks.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 84 +++++++++++++++++++++++++++
 1 file changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 017c94e88c21..85055b9dd086 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/interconnect/qcom,msm8996.h>
 #include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -47,6 +48,7 @@ CPU0: cpu@0 {
 			capacity-dmips-mhz = <1024>;
 			clocks = <&kryocc 0>;
 			operating-points-v2 = <&cluster0_opp>;
+			interconnects = <&bimc MASTER_AMPSS_M0 &bimc SLAVE_EBI_CH0>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
@@ -64,6 +66,7 @@ CPU1: cpu@1 {
 			capacity-dmips-mhz = <1024>;
 			clocks = <&kryocc 0>;
 			operating-points-v2 = <&cluster0_opp>;
+			interconnects = <&bimc MASTER_AMPSS_M0 &bimc SLAVE_EBI_CH0>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_0>;
 		};
@@ -77,6 +80,7 @@ CPU2: cpu@100 {
 			capacity-dmips-mhz = <1024>;
 			clocks = <&kryocc 1>;
 			operating-points-v2 = <&cluster1_opp>;
+			interconnects = <&bimc MASTER_AMPSS_M0 &bimc SLAVE_EBI_CH0>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
@@ -94,6 +98,7 @@ CPU3: cpu@101 {
 			capacity-dmips-mhz = <1024>;
 			clocks = <&kryocc 1>;
 			operating-points-v2 = <&cluster1_opp>;
+			interconnects = <&bimc MASTER_AMPSS_M0 &bimc SLAVE_EBI_CH0>;
 			#cooling-cells = <2>;
 			next-level-cache = <&L2_1>;
 		};
@@ -904,6 +909,15 @@ gcc: clock-controller@300000 {
 			clock-names = "cxo2";
 		};
 
+		bimc: interconnect@408000 {
+			compatible = "qcom,msm8996-bimc";
+			reg = <0x00408000 0x5a000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+				 <&rpmcc RPM_SMD_BIMC_A_CLK>;
+		};
+
 		tsens0: thermal-sensor@4a9000 {
 			compatible = "qcom,msm8996-tsens", "qcom,tsens-v2";
 			reg = <0x004a9000 0x1000>, /* TM */
@@ -926,6 +940,61 @@ tsens1: thermal-sensor@4ad000 {
 			#thermal-sensor-cells = <1>;
 		};
 
+		cnoc: interconnect@500000 {
+			compatible = "qcom,msm8996-cnoc";
+			reg = <0x00500000 0x1000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
+				 <&rpmcc RPM_SMD_CNOC_A_CLK>;
+		};
+
+		snoc: interconnect@524000 {
+			compatible = "qcom,msm8996-snoc";
+			reg = <0x00524000 0x1c000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+				 <&rpmcc RPM_SMD_SNOC_A_CLK>;
+		};
+
+		a1noc: interconnect@562000 {
+			compatible = "qcom,msm8996-a1noc";
+			reg = <0x00562000 0x5000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>,
+				 <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>;
+		};
+
+		a2noc: interconnect@583000 {
+			compatible = "qcom,msm8996-a2noc";
+			reg = <0x00583000 0x7000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
+				 <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
+		};
+
+		mnoc: interconnect@5a4000 {
+			compatible = "qcom,msm8996-mnoc";
+			reg = <0x005a4000 0x1c000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a", "iface";
+			clocks = <&rpmcc RPM_SMD_MMAXI_CLK>,
+				 <&rpmcc RPM_SMD_MMAXI_A_CLK>,
+				 <&mmcc AHB_CLK_SRC>;
+		};
+
+		pnoc: interconnect@5c0000 {
+			compatible = "qcom,msm8996-pnoc";
+			reg = <0x005c0000 0x3000>;
+			#interconnect-cells = <1>;
+			clock-names = "bus", "bus_a";
+			clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
+				 <&rpmcc RPM_SMD_PCNOC_A_CLK>;
+		};
+
 		tcsr_mutex_regs: syscon@740000 {
 			compatible = "syscon";
 			reg = <0x00740000 0x40000>;
@@ -1005,6 +1074,11 @@ mdp: mdp@901000 {
 				assigned-clock-rates = <300000000>,
 					 <19200000>;
 
+				interconnects = <&mnoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>,
+						<&mnoc MASTER_MDP_PORT1 &bimc SLAVE_EBI_CH0>,
+						<&mnoc MASTER_ROTATOR &bimc SLAVE_EBI_CH0>;
+				interconnect-names = "mdp0-mem", "mdp1-mem", "rotator-mem";
+
 				ports {
 					#address-cells = <1>;
 					#size-cells = <0>;
@@ -1266,6 +1340,9 @@ gpu: gpu@b00000 {
 				"mem",
 				"mem_iface";
 
+			interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>;
+			interconnect-names = "gfx-mem";
+
 			power-domains = <&mmcc GPU_GX_GDSC>;
 			iommus = <&adreno_smmu 0>;
 
@@ -2289,6 +2366,9 @@ venus: video-codec@c00000 {
 				 <&mmcc VIDEO_AXI_CLK>,
 				 <&mmcc VIDEO_MAXI_CLK>;
 			clock-names = "core", "iface", "bus", "mbus";
+			interconnects = <&mnoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>,
+					<&bimc MASTER_AMPSS_M0 &mnoc SLAVE_VENUS_CFG>;
+			interconnect-names = "video-mem", "cpu-cfg";
 			iommus = <&venus_smmu 0x00>,
 				 <&venus_smmu 0x01>,
 				 <&venus_smmu 0x0a>,
@@ -3004,6 +3084,10 @@ usb3: usb@6af8800 {
 					  <&gcc GCC_USB30_MASTER_CLK>;
 			assigned-clock-rates = <19200000>, <120000000>;
 
+			interconnects = <&a2noc MASTER_USB3 &bimc SLAVE_EBI_CH0>,
+					<&bimc MASTER_AMPSS_M0 &snoc SLAVE_USB3>;
+			interconnect-names = "usb-ddr", "apps-usb";
+
 			power-domains = <&gcc USB30_GDSC>;
 			status = "disabled";
 
-- 
2.32.0



      parent reply	other threads:[~2021-08-01 15:25 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-01 15:24 [PATCH v2 0/6] interconnect: qcom: Add MSM8996 interconnect driver Yassine Oudjana
2021-08-01 15:25 ` [PATCH v2 1/6] interconnect: qcom: icc-rpmh: Rename qcom_icc_set Yassine Oudjana
2021-08-01 15:25 ` [PATCH v2 2/6] interconnect: qcom: sdm660: Commonize RPM-QoS Yassine Oudjana
2021-08-01 15:25 ` [PATCH v2 3/6] dt-bindings: interconnect: Move SDM660 to a new RPM-QoS file Yassine Oudjana
2021-08-06 21:34   ` Rob Herring
2021-08-01 15:25 ` [PATCH v2 4/6] interconnect: qcom: Add MSM8996 interconnect provider driver Yassine Oudjana
2021-08-06 21:35   ` Rob Herring
2021-08-01 15:25 ` [PATCH v2 5/6] dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings Yassine Oudjana
2021-08-01 15:25 ` Yassine Oudjana [this message]

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