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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: gregkh@linuxfoundation.org
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
	linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org,
	linux-kernel@vger.kernel.org, loic.poulain@linaro.org,
	ULRICH Thomas <thomas.ulrich@thalesgroup.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 02/10] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI
Date: Mon,  2 Aug 2021 10:42:47 +0530	[thread overview]
Message-ID: <20210802051255.5771-3-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org>

From: ULRICH Thomas <thomas.ulrich@thalesgroup.com>

This patch adds VendorID/ProductID and MBIM Channel Definitions for
M.2 Modem Card (PCIe Variant) to MHI PCI generic controller driver.

Cinterion MV31-W (by Thales)
Additional information on such Modem Card (USB or PCIe variant) is
available at:
https://www.thalesgroup.com/en/markets/digital-identity-and-security/iot/iot-connectivity/products/iot-products/mv31-w-ultra-high

Signed-off-by: ULRICH Thomas <thomas.ulrich@thalesgroup.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/PAZP264MB284690134DA010698E6B3BDDE60A9@PAZP264MB2846.FRAP264.PROD.OUTLOOK.COM
[mani: fixed the subject, whitespace, and added sideband_wake field]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/bus/mhi/pci_generic.c | 37 +++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index ca3bc40427f8..6e1a86021b75 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -342,6 +342,40 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
 	.dma_data_width = 32
 };
 
+static const struct mhi_channel_config mhi_mv31_channels[] = {
+	MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0),
+	MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0),
+	/* MBIM Control Channel */
+	MHI_CHANNEL_CONFIG_UL(12, "MBIM", 64, 0),
+	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 64, 0),
+	/* MBIM Data Channel */
+	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 512, 2),
+	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 512, 3),
+};
+
+static struct mhi_event_config mhi_mv31_events[] = {
+	MHI_EVENT_CONFIG_CTRL(0, 256),
+	MHI_EVENT_CONFIG_DATA(1, 256),
+	MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
+	MHI_EVENT_CONFIG_HW_DATA(3, 1024, 101),
+};
+
+static const struct mhi_controller_config modem_mv31_config = {
+	.max_channels = 128,
+	.timeout_ms = 20000,
+	.num_channels = ARRAY_SIZE(mhi_mv31_channels),
+	.ch_cfg = mhi_mv31_channels,
+	.num_events = ARRAY_SIZE(mhi_mv31_events),
+	.event_cfg = mhi_mv31_events,
+};
+
+static const struct mhi_pci_dev_info mhi_mv31_info = {
+	.name = "cinterion-mv31",
+	.config = &modem_mv31_config,
+	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+	.dma_data_width = 32,
+};
+
 static const struct pci_device_id mhi_pci_id_table[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306),
 		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info },
@@ -362,6 +396,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
 	/* DW5930e (sdx55), Non-eSIM, It's also T99W175 */
 	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b1),
 		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
+	/* MV31-W (Cinterion) */
+	{ PCI_DEVICE(0x1269, 0x00b3),
+		.driver_data = (kernel_ulong_t) &mhi_mv31_info },
 	{  }
 };
 MODULE_DEVICE_TABLE(pci, mhi_pci_id_table);
-- 
2.25.1


  parent reply	other threads:[~2021-08-02  5:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02  5:12 [PATCH 00/10] MHI patches for v5.15 - Take 1 Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 01/10] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-08-02  5:12 ` Manivannan Sadhasivam [this message]
2021-08-02  5:12 ` [PATCH 03/10] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 04/10] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 05/10] bus: mhi: Add MMIO region length to controller structure Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 06/10] ath11k: set register access length for MHI driver Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 07/10] bus: mhi: pci_generic: Set " Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 08/10] bus: mhi: core: Add range checks for BHI and BHIe Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 09/10] bus: mhi: core: Replace DMA allocation wrappers with original APIs Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 10/10] bus: mhi: core: Improve debug messages for power up Manivannan Sadhasivam

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