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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: gregkh@linuxfoundation.org
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
	linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org,
	linux-kernel@vger.kernel.org, loic.poulain@linaro.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	Kalle Valo <kvalo@codeaurora.org>
Subject: [PATCH 06/10] ath11k: set register access length for MHI driver
Date: Mon,  2 Aug 2021 10:42:51 +0530	[thread overview]
Message-ID: <20210802051255.5771-7-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org>

From: Bhaumik Bhatt <bbhatt@codeaurora.org>

MHI driver requires register space length to add range checks and
prevent memory region accesses outside of that for MMIO space.
Set it before registering the MHI controller.

Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
Reviewed-by: Hemant Kumar <hemantk@codeaurora.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/1620330705-40192-5-git-send-email-bbhatt@codeaurora.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/net/wireless/ath/ath11k/mhi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c
index 75cc2d80fde8..26c7ae242db6 100644
--- a/drivers/net/wireless/ath/ath11k/mhi.c
+++ b/drivers/net/wireless/ath/ath11k/mhi.c
@@ -330,6 +330,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)
 	mhi_ctrl->cntrl_dev = ab->dev;
 	mhi_ctrl->fw_image = ab_pci->amss_path;
 	mhi_ctrl->regs = ab->mem;
+	mhi_ctrl->reg_len = ab->mem_len;
 
 	ret = ath11k_mhi_get_msi(ab_pci);
 	if (ret) {
-- 
2.25.1


  parent reply	other threads:[~2021-08-02  5:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02  5:12 [PATCH 00/10] MHI patches for v5.15 - Take 1 Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 01/10] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 02/10] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 03/10] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 04/10] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 05/10] bus: mhi: Add MMIO region length to controller structure Manivannan Sadhasivam
2021-08-02  5:12 ` Manivannan Sadhasivam [this message]
2021-08-02  5:12 ` [PATCH 07/10] bus: mhi: pci_generic: Set register access length for MHI driver Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 08/10] bus: mhi: core: Add range checks for BHI and BHIe Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 09/10] bus: mhi: core: Replace DMA allocation wrappers with original APIs Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 10/10] bus: mhi: core: Improve debug messages for power up Manivannan Sadhasivam

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