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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: gregkh@linuxfoundation.org
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
	linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org,
	linux-kernel@vger.kernel.org, loic.poulain@linaro.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 07/10] bus: mhi: pci_generic: Set register access length for MHI driver
Date: Mon,  2 Aug 2021 10:42:52 +0530	[thread overview]
Message-ID: <20210802051255.5771-8-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org>

From: Bhaumik Bhatt <bbhatt@codeaurora.org>

MHI driver requires register space length to add range checks and
prevent memory region accesses outside of that for MMIO space.
Set it from the PCI generic controller driver before registering
the MHI controller.

Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
Reviewed-by: Hemant Kumar <hemantk@codeaurora.org>
Reviewed-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1620330705-40192-6-git-send-email-bbhatt@codeaurora.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/bus/mhi/pci_generic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index 6e1a86021b75..c772d94025fe 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -500,6 +500,7 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl,
 		return err;
 	}
 	mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num];
+	mhi_cntrl->reg_len = pci_resource_len(pdev, bar_num);
 
 	err = pci_set_dma_mask(pdev, dma_mask);
 	if (err) {
-- 
2.25.1


  parent reply	other threads:[~2021-08-02  5:13 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02  5:12 [PATCH 00/10] MHI patches for v5.15 - Take 1 Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 01/10] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 02/10] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 03/10] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 04/10] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 05/10] bus: mhi: Add MMIO region length to controller structure Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 06/10] ath11k: set register access length for MHI driver Manivannan Sadhasivam
2021-08-02  5:12 ` Manivannan Sadhasivam [this message]
2021-08-02  5:12 ` [PATCH 08/10] bus: mhi: core: Add range checks for BHI and BHIe Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 09/10] bus: mhi: core: Replace DMA allocation wrappers with original APIs Manivannan Sadhasivam
2021-08-02  5:12 ` [PATCH 10/10] bus: mhi: core: Improve debug messages for power up Manivannan Sadhasivam

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