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From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
	"Michael Ellerman" <mpe@ellerman.id.au>,
	"Benjamin Herrenschmidt" <benh@kernel.crashing.org>,
	"Paul Mackerras" <paulus@samba.org>,
	"Ley Foon Tan" <ley.foon.tan@intel.com>,
	"Chris Zankel" <chris@zankel.net>,
	"Max Filippov" <jcmvbkbc@gmail.com>,
	"Vineet Gupta" <vgupta@synopsys.com>,
	"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
	"Robert Jarzmik" <robert.jarzmik@free.fr>,
	"Russell King" <linux@armlinux.org.uk>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Rich Felker" <dalias@libc.org>,
	"Geert Uytterhoeven" <geert@linux-m68k.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"David Airlie" <airlied@linux.ie>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Rob Clark" <robdclark@gmail.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	kernel-team@android.com
Subject: [PATCH v2 05/14] gpu: Bulk conversion to generic_handle_domain_irq()
Date: Mon,  2 Aug 2021 17:26:21 +0100	[thread overview]
Message-ID: <20210802162630.2219813-6-maz@kernel.org> (raw)
In-Reply-To: <20210802162630.2219813-1-maz@kernel.org>

Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c   |  2 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c  | 15 ++++-----------
 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c |  3 +--
 drivers/gpu/ipu-v3/ipu-common.c           | 11 ++++-------
 4 files changed, 10 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 83af307e97cd..cd2e18f072fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -502,7 +502,7 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
 
 	} else if ((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) &&
 		   adev->irq.virq[src_id]) {
-		generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
+		generic_handle_domain_irq(adev->irq.domain, src_id);
 
 	} else if (!adev->irq.client[client_id].sources) {
 		DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
index 6b0a7bc87eb7..b466784d9822 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
@@ -45,20 +45,13 @@ static void dpu_mdss_irq(struct irq_desc *desc)
 
 	while (interrupts) {
 		irq_hw_number_t hwirq = fls(interrupts) - 1;
-		unsigned int mapping;
 		int rc;
 
-		mapping = irq_find_mapping(dpu_mdss->irq_controller.domain,
-					   hwirq);
-		if (mapping == 0) {
-			DRM_ERROR("couldn't find irq mapping for %lu\n", hwirq);
-			break;
-		}
-
-		rc = generic_handle_irq(mapping);
+		rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
+					       hwirq);
 		if (rc < 0) {
-			DRM_ERROR("handle irq fail: irq=%lu mapping=%u rc=%d\n",
-				  hwirq, mapping, rc);
+			DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
+				  hwirq, rc);
 			break;
 		}
 
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
index 09bd46ad820b..2f4895bcb0b0 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
@@ -50,8 +50,7 @@ static irqreturn_t mdss_irq(int irq, void *arg)
 	while (intr) {
 		irq_hw_number_t hwirq = fls(intr) - 1;
 
-		generic_handle_irq(irq_find_mapping(
-				mdp5_mdss->irqcontroller.domain, hwirq));
+		generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
 		intr &= ~(1 << hwirq);
 	}
 
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index d166ee262ce4..118318513e2d 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1003,19 +1003,16 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
 static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs)
 {
 	unsigned long status;
-	int i, bit, irq;
+	int i, bit;
 
 	for (i = 0; i < num_regs; i++) {
 
 		status = ipu_cm_read(ipu, IPU_INT_STAT(regs[i]));
 		status &= ipu_cm_read(ipu, IPU_INT_CTRL(regs[i]));
 
-		for_each_set_bit(bit, &status, 32) {
-			irq = irq_linear_revmap(ipu->domain,
-						regs[i] * 32 + bit);
-			if (irq)
-				generic_handle_irq(irq);
-		}
+		for_each_set_bit(bit, &status, 32)
+			generic_handle_domain_irq(ipu->domain,
+						  regs[i] * 32 + bit);
 	}
 }
 
-- 
2.30.2


  parent reply	other threads:[~2021-08-02 16:27 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02 16:26 [PATCH v2 00/14][treewide] irqdomain: Simplify interrupt handling Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 01/14] gpio: Bulk conversion to generic_handle_domain_irq() Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 02/14] pinctrl: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 03/14] PCI: " Marc Zyngier
2021-08-02 16:59   ` Bjorn Helgaas
2021-08-02 16:26 ` [PATCH v2 04/14] mfd: " Marc Zyngier
2021-08-02 16:26 ` Marc Zyngier [this message]
2021-08-02 16:26 ` [PATCH v2 06/14] SH: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 07/14] ARM: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 08/14] mips: " Marc Zyngier
2021-08-05  9:10   ` Thomas Bogendoerfer
2021-08-02 16:26 ` [PATCH v2 09/14] arc: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 10/14] xtensa: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 11/14] nios2: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 12/14] powerpc: " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 13/14] EDAC/altera: Convert " Marc Zyngier
2021-08-02 16:26 ` [PATCH v2 14/14] Documentation: Update irq_domain.rst with new lookup APIs Marc Zyngier

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