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From: Chester Lin <clin@suse.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-serial@vger.kernel.org,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Shawn Guo" <shawnguo@kernel.org>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Oleksij Rempel" <linux@rempel-privat.de>,
"Stefan Riedmueller" <s.riedmueller@phytec.de>,
"Matthias Schiffer" <matthias.schiffer@ew.tq-group.com>,
"Li Yang" <leoyang.li@nxp.com>,
"Fabio Estevam" <festevam@gmail.com>,
"Matteo Lisi" <matteo.lisi@engicam.com>,
"Frieder Schrempf" <frieder.schrempf@kontron.de>,
"Tim Harvey" <tharvey@gateworks.com>,
"Jagan Teki" <jagan@amarulasolutions.com>,
s32@nxp.com, catalin-dan.udma@nxp.com, bogdan.hamciuc@nxp.com,
bogdan.folea@nxp.com, ciprianmarian.costea@nxp.com,
radu-nicolae.pirea@nxp.com, ghennadi.procopciuc@nxp.com,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Andreas Färber" <afaerber@suse.de>,
"Ivan T . Ivanov" <iivanov@suse.de>,
"Lee, Chun-Yi" <jlee@suse.com>, "Chester Lin" <clin@suse.com>
Subject: [PATCH 5/8] arm64: dts: s32g2: add serial/uart support
Date: Thu, 5 Aug 2021 14:54:26 +0800 [thread overview]
Message-ID: <20210805065429.27485-6-clin@suse.com> (raw)
In-Reply-To: <20210805065429.27485-1-clin@suse.com>
Add serial/uart support for NXP S32G2.
Signed-off-by: Chester Lin <clin@suse.com>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 31 ++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 3321819c1a2d..0076eacad8a6 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 SUSE LLC
+ * Copyright 2017-2020 NXP
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -11,6 +12,12 @@ / {
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -82,6 +89,30 @@ soc {
ranges;
+ uart0: serial@401c8000 {
+ compatible = "fsl,s32g2-linflexuart",
+ "fsl,s32v234-linflexuart";
+ reg = <0 0x401c8000 0 0x3000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ uart1: serial@401cc000 {
+ compatible = "fsl,s32g2-linflexuart",
+ "fsl,s32v234-linflexuart";
+ reg = <0 0x401cc000 0 0x3000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ uart2: serial@402bc000 {
+ compatible = "fsl,s32g2-linflexuart",
+ "fsl,s32v234-linflexuart";
+ reg = <0 0x402bc000 0 0x3000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@50800000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.30.0
next prev parent reply other threads:[~2021-08-05 6:55 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 6:54 [PATCH 0/8] arm64: dts: initial NXP S32G2 support Chester Lin
2021-08-05 6:54 ` [PATCH 1/8] dt-bindings: arm: fsl: add NXP S32G2 boards Chester Lin
2021-08-12 15:46 ` Andreas Färber
2021-08-13 17:49 ` Rob Herring
2021-08-13 17:53 ` Rob Herring
2021-08-18 14:34 ` Chester Lin
2021-09-06 20:38 ` Andreas Färber
2021-09-07 6:59 ` Krzysztof Kozlowski
2021-09-07 8:59 ` Andreas Färber
2021-09-06 19:35 ` Andreas Färber
2021-08-05 6:54 ` [PATCH 2/8] dt-bindings: serial: fsl-linflexuart: convert to json-schema format Chester Lin
2021-08-12 16:04 ` Andreas Färber
2021-08-13 11:11 ` Chester Lin
2021-08-13 11:28 ` Krzysztof Kozlowski
2021-08-13 11:43 ` Chester Lin
2021-08-13 18:04 ` Rob Herring
2021-08-13 18:07 ` Rob Herring
2021-08-05 6:54 ` [PATCH 3/8] dt-bindings: serial: fsl-linflexuart: Add compatible for S32G2 Chester Lin
2021-08-12 16:27 ` Andreas Färber
2021-08-13 14:27 ` Radu Nicolae Pirea (NXP OSS)
2021-08-13 18:11 ` Rob Herring
2021-08-13 18:09 ` Rob Herring
2021-08-05 6:54 ` [PATCH 4/8] arm64: dts: add NXP S32G2 support Chester Lin
2021-08-12 17:26 ` Andreas Färber
2021-08-13 3:28 ` Chester Lin
2021-08-13 7:05 ` Andreas Färber
2021-08-20 13:12 ` Marc Zyngier
2021-08-20 15:15 ` Chester Lin
2021-08-20 15:29 ` Marc Zyngier
2021-08-21 12:39 ` Chester Lin
2021-08-21 14:20 ` Marc Zyngier
2021-08-05 6:54 ` Chester Lin [this message]
2021-08-12 17:42 ` [PATCH 5/8] arm64: dts: s32g2: add serial/uart support Andreas Färber
2021-08-13 9:54 ` Radu Nicolae Pirea (NXP OSS)
2021-08-05 6:54 ` [PATCH 6/8] arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support Chester Lin
2021-08-12 18:00 ` Andreas Färber
2021-08-13 8:47 ` Chester Lin
2021-08-05 6:54 ` [PATCH 7/8] arm64: dts: s32g2: add memory nodes for evb and rdb2 Chester Lin
2021-08-12 18:25 ` Andreas Färber
2021-08-13 14:58 ` Chester Lin
2021-08-05 6:54 ` [PATCH 8/8] MAINTAINERS: Add an entry for NXP S32G2 boards Chester Lin
2021-08-05 7:49 ` Krzysztof Kozlowski
2021-08-09 8:03 ` Shawn Guo
2021-08-12 15:30 ` Andreas Färber
2021-08-12 15:54 ` Krzysztof Kozlowski
2021-08-09 8:06 ` [PATCH 0/8] arm64: dts: initial NXP S32G2 support Shawn Guo
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