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From: Richard Fitzgerald <rf@opensource.cirrus.com>
To: <broonie@kernel.org>
Cc: <alsa-devel@alsa-project.org>, <patches@opensource.cirrus.com>,
<linux-kernel@vger.kernel.org>,
Richard Fitzgerald <rf@opensource.cirrus.com>
Subject: [PATCH 04/12] ASoC: cs42l42: Don't reconfigure the PLL while it is running
Date: Tue, 10 Aug 2021 16:37:51 +0100 [thread overview]
Message-ID: <20210810153759.24333-5-rf@opensource.cirrus.com> (raw)
In-Reply-To: <20210810153759.24333-1-rf@opensource.cirrus.com>
cs42l42_pcm_hw_params() must only configure the PLL if this is the first
stream to become active, otherwise it will be overwriting the registers
while the PLL is running.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Fixes: 43fc357199f9 ("ASoC: cs42l42: Set clock source for both ways of stream")
---
sound/soc/codecs/cs42l42.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 5dc3a30272a4..1893d3694570 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -884,7 +884,11 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
break;
}
- return cs42l42_pll_config(component);
+ /* Configure the PLL if this is the first active stream */
+ if (!cs42l42->stream_use)
+ return cs42l42_pll_config(component);
+ else
+ return 0;
}
static int cs42l42_set_sysclk(struct snd_soc_dai *dai,
--
2.11.0
next prev parent reply other threads:[~2021-08-10 15:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 15:37 [PATCH 00/12] ASoC: cs42l42: Series of bugfixes and improvements Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 01/12] ASoC: cs42l42: Use PLL for SCLK > 12.188MHz Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 02/12] ASoC: cs42l42: Don't claim to support 192k Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 03/12] ASoC: cs42l42: Always configure both ASP TX channels Richard Fitzgerald
2021-08-10 15:37 ` Richard Fitzgerald [this message]
2021-08-10 15:49 ` [PATCH 04/12] ASoC: cs42l42: Don't reconfigure the PLL while it is running Mark Brown
2021-08-10 16:27 ` Richard Fitzgerald
2021-08-11 11:56 ` Mark Brown
2021-08-11 12:21 ` Richard Fitzgerald
2021-08-11 14:41 ` Mark Brown
2021-08-11 10:56 ` Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 05/12] ASoC: cs42l42: Set correct SRC MCLK Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 06/12] ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 07/12] ASoC: cs42l42: Allow time for HP/ADC to power-up after enable Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 08/12] ASoC: cs42l42: Prevent NULL pointer deref in interrupt handler Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 09/12] ASoC: cs42l42: Remove runtime_suspend/runtime_resume callbacks Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 10/12] ASoC: cs42l42: Remove redundant pll_divout member Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 11/12] ASoC: cs42l42: Add HP Volume Scale control Richard Fitzgerald
2021-08-10 15:37 ` [PATCH 12/12] ASoC: cs42l42: Add control for audio slow-start switch Richard Fitzgerald
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