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From: Herbert Xu <herbert@gondor.apana.org.au>
To: Kai Ye <yekai13@huawei.com>
Cc: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	wangzhou1@hisilicon.com
Subject: Re: [PATCH 2/2] crypto: hisilicon/sec - modify the hardware endian configuration
Date: Thu, 12 Aug 2021 19:04:40 +0800	[thread overview]
Message-ID: <20210812110440.GB5890@gondor.apana.org.au> (raw)
In-Reply-To: <1628243914-33224-3-git-send-email-yekai13@huawei.com>

On Fri, Aug 06, 2021 at 05:58:34PM +0800, Kai Ye wrote:
>
> +	reg &= ~(BIT(1) | BIT(0));
> +#ifndef CONFIG_64BIT
> +	reg |= BIT(1);
> +#endif
> +
> +#ifndef CONFIG_CPU_LITTLE_ENDIAN
> +	reg |= BIT(0);
> +#endif

Please rewrite these without ifdefs.  For example,

	if (!IS_ENABLED(CONFIG_64BIT))
		reg |= BIT(1);
	if (!IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
		reg |= BIT(0);

I can't vouch for the logic here so please double-check.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

      reply	other threads:[~2021-08-12 11:04 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-06  9:58 [PATCH 0/2] crypto: hisilicon - some misc bugfix for SEC engine Kai Ye
2021-08-06  9:58 ` [PATCH 1/2] crypto: hisilicon/sec - fix the abnormal exiting process Kai Ye
2021-08-06  9:58 ` [PATCH 2/2] crypto: hisilicon/sec - modify the hardware endian configuration Kai Ye
2021-08-12 11:04   ` Herbert Xu [this message]

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