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From: Jeremy Linton <jeremy.linton@arm.com>
To: linux-pci@vger.kernel.org
Cc: lorenzo.pieralisi@arm.com, nsaenz@kernel.org,
	bhelgaas@google.com, rjw@rjwysocki.net, lenb@kernel.org,
	robh@kernel.org, kw@linux.com, f.fainelli@gmail.com,
	sdonthineni@nvidia.com, stefan.wahren@i2se.com,
	bcm-kernel-feedback-list@broadcom.com,
	linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Jeremy Linton <jeremy.linton@arm.com>
Subject: [PATCH v2 3/4] PCI/ACPI: Add Broadcom bcm2711 MCFG quirk
Date: Thu, 19 Aug 2021 16:56:54 -0500	[thread overview]
Message-ID: <20210819215655.84866-4-jeremy.linton@arm.com> (raw)
In-Reply-To: <20210819215655.84866-1-jeremy.linton@arm.com>

Now that there is a bcm2711 quirk, it needs to be enabled when the
MCFG is missing. Use an ACPI namespace _DSD property
"linux-ecam-quirk-id" as an alternative to the MCFG OEM.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 drivers/acpi/pci_mcfg.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 53cab975f612..4b991ee5c66c 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -169,6 +169,9 @@ static struct mcfg_fixup mcfg_quirks[] = {
 	ALTRA_ECAM_QUIRK(1, 13),
 	ALTRA_ECAM_QUIRK(1, 14),
 	ALTRA_ECAM_QUIRK(1, 15),
+
+	{ "bcm2711", "", 0, 0, MCFG_BUS_ANY, &bcm2711_pcie_ops,
+	  DEFINE_RES_MEM(0xFD500000, 0xA000) },
 };
 
 static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
@@ -198,8 +201,18 @@ static void pci_mcfg_apply_quirks(struct acpi_pci_root *root,
 	u16 segment = root->segment;
 	struct resource *bus_range = &root->secondary;
 	struct mcfg_fixup *f;
+	const char *soc;
 	int i;
 
+	/*
+	 * This may be a machine with a PCI/SMC conduit, which means it doesn't
+	 * have an MCFG. Use an ACPI namespace definition instead.
+	 */
+	if (!fwnode_property_read_string(acpi_fwnode_handle(root->device),
+					 "linux-ecam-quirk-id", &soc)) {
+		memcpy(mcfg_oem_id, soc, ACPI_OEM_ID_SIZE);
+	}
+
 	for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
 		if (pci_mcfg_quirk_matches(f, segment, bus_range)) {
 			if (f->cfgres.start)
-- 
2.31.1


  parent reply	other threads:[~2021-08-19 21:57 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-19 21:56 [PATCH v2 0/4] CM4 ACPI PCIe quirk Jeremy Linton
2021-08-19 21:56 ` [PATCH v2 1/4] PCI: brcmstb: Break register definitions into separate header Jeremy Linton
2021-08-22  8:49   ` Florian Fainelli
2021-08-19 21:56 ` [PATCH v2 2/4] PCI: brcmstb: Add ACPI config space quirk Jeremy Linton
2021-08-20 19:06   ` Bjorn Helgaas
2021-08-20 20:31     ` Jeremy Linton
2021-08-22  8:52   ` Florian Fainelli
2021-08-29 11:13   ` Pali Rohár
2021-08-30 16:10     ` Jeremy Linton
2021-08-30 16:54       ` Pali Rohár
2021-08-19 21:56 ` Jeremy Linton [this message]
2021-08-22  8:53   ` [PATCH v2 3/4] PCI/ACPI: Add Broadcom bcm2711 MCFG quirk Florian Fainelli
2021-08-24 21:39     ` Jeremy Linton
2021-08-25 16:23       ` Florian Fainelli
2021-08-19 21:56 ` [PATCH v2 4/4] MAINTAINERS: Widen brcmstb PCIe file scope Jeremy Linton
2021-08-20 19:09   ` Bjorn Helgaas
2021-08-22  8:55     ` Florian Fainelli
2021-08-20 19:11 ` [PATCH v2 0/4] CM4 ACPI PCIe quirk Bjorn Helgaas

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