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From: Bjorn Helgaas <helgaas@kernel.org>
To: Jeremy Linton <jeremy.linton@arm.com>
Cc: linux-pci@vger.kernel.org, lorenzo.pieralisi@arm.com,
	nsaenz@kernel.org, bhelgaas@google.com, rjw@rjwysocki.net,
	lenb@kernel.org, robh@kernel.org, kw@linux.com,
	f.fainelli@gmail.com, sdonthineni@nvidia.com,
	stefan.wahren@i2se.com, bcm-kernel-feedback-list@broadcom.com,
	linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rpi-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/4] CM4 ACPI PCIe quirk
Date: Fri, 20 Aug 2021 14:11:14 -0500	[thread overview]
Message-ID: <20210820191114.GA3341026@bjorn-Precision-5520> (raw)
In-Reply-To: <20210819215655.84866-1-jeremy.linton@arm.com>

On Thu, Aug 19, 2021 at 04:56:51PM -0500, Jeremy Linton wrote:
> The PFTF CM4 is an ACPI platform that is following the Arm PCIe SMC
> (DEN0115) standard because its PCIe config space isn't ECAM compliant
> since it is split into two parts. One part describes the root port
> registers, and another contains a moveable window pointing at a given
> device's 4K config space. Thus it doesn't have an MCFG table. As
> Linux doesn't support the PCI/SMC, a host bridge specific _DSD is
> added and associated with custom ECAM ops and cfgres.  The custom cfg
> op selects between those two regions, as well as disallowing
> problematic accesses.
> 
> V1->V2:
> 	Only move register definitions to new .h file, add
> 	     include guards.
> 	Change quirk namespace identifier.
> 	Update Maintainers file.
> 	A number of whitespace, grammar, etc fixes.
> 
> 
> Jeremy Linton (4):
>   PCI: brcmstb: Break register definitions into separate header
>   PCI: brcmstb: Add ACPI config space quirk
>   PCI/ACPI: Add Broadcom bcm2711 MCFG quirk
>   MAINTAINERS: Widen brcmstb PCIe file scope
> 
>  MAINTAINERS                                |   2 +-
>  drivers/acpi/pci_mcfg.c                    |  13 ++
>  drivers/pci/controller/Makefile            |   1 +
>  drivers/pci/controller/pcie-brcmstb-acpi.c |  74 ++++++++++
>  drivers/pci/controller/pcie-brcmstb.c      | 150 +-------------------
>  drivers/pci/controller/pcie-brcmstb.h      | 155 +++++++++++++++++++++
>  include/linux/pci-ecam.h                   |   1 +
>  7 files changed, 247 insertions(+), 149 deletions(-)
>  create mode 100644 drivers/pci/controller/pcie-brcmstb-acpi.c
>  create mode 100644 drivers/pci/controller/pcie-brcmstb.h

I'm fine with all of these, given the minor comments I made.

Lorenzo, if you want to pick this up after Jeremy updates it:

Acked-by: Bjorn Helgaas <bhelgaas@google.com>


      parent reply	other threads:[~2021-08-20 19:11 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-19 21:56 Jeremy Linton
2021-08-19 21:56 ` [PATCH v2 1/4] PCI: brcmstb: Break register definitions into separate header Jeremy Linton
2021-08-22  8:49   ` Florian Fainelli
2021-08-19 21:56 ` [PATCH v2 2/4] PCI: brcmstb: Add ACPI config space quirk Jeremy Linton
2021-08-20 19:06   ` Bjorn Helgaas
2021-08-20 20:31     ` Jeremy Linton
2021-08-22  8:52   ` Florian Fainelli
2021-08-29 11:13   ` Pali Rohár
2021-08-30 16:10     ` Jeremy Linton
2021-08-30 16:54       ` Pali Rohár
2021-08-19 21:56 ` [PATCH v2 3/4] PCI/ACPI: Add Broadcom bcm2711 MCFG quirk Jeremy Linton
2021-08-22  8:53   ` Florian Fainelli
2021-08-24 21:39     ` Jeremy Linton
2021-08-25 16:23       ` Florian Fainelli
2021-08-19 21:56 ` [PATCH v2 4/4] MAINTAINERS: Widen brcmstb PCIe file scope Jeremy Linton
2021-08-20 19:09   ` Bjorn Helgaas
2021-08-22  8:55     ` Florian Fainelli
2021-08-20 19:11 ` Bjorn Helgaas [this message]

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