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* [PATCH v3 0/2] net: Add LiteETH network driver
@ 2021-08-25 12:46 Joel Stanley
  2021-08-25 12:46 ` [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH Joel Stanley
  2021-08-25 12:46 ` [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface Joel Stanley
  0 siblings, 2 replies; 5+ messages in thread
From: Joel Stanley @ 2021-08-25 12:46 UTC (permalink / raw)
  To: David S . Miller, Jakub Kicinski, Rob Herring
  Cc: Karol Gugala, Mateusz Holenko, devicetree, Florent Kermarrec,
	Gabriel L . Somlo, netdev, linux-kernel

This adds a driver for the LiteX network device, LiteEth.

v3 Updates the bindings to describe the slots in a way that makes more
sense for the hardware, instead of trying to fit some existing
properties. The driver is updated to use these bindings, and fix some
issues pointed out by Gabriel.

v2 Addresses feedback from Jakub, with detailed changes in each patch.

It also moves to the litex register accessors so the system works on big
endian litex platforms. I tested with mor1k on an Arty A7-100T.

I have removed the mdio aspects of the driver as they are not needed for
basic operation. I will continue to work on adding support in the
future, but I don't think it needs to block the mac driver going in.

The binding describes the mdio registers, and has been fixed to not show
any warnings against dtschema master.

LiteEth is a simple driver for the FPGA based Ethernet device used in various
RISC-V, PowerPC's microwatt, OpenRISC's mor1k and other FPGA based
systems on chip.

Joel Stanley (2):
  dt-bindings: net: Add bindings for LiteETH
  net: Add driver for LiteX's LiteETH network interface

 .../bindings/net/litex,liteeth.yaml           | 100 ++++++
 drivers/net/ethernet/Kconfig                  |   1 +
 drivers/net/ethernet/Makefile                 |   1 +
 drivers/net/ethernet/litex/Kconfig            |  27 ++
 drivers/net/ethernet/litex/Makefile           |   5 +
 drivers/net/ethernet/litex/litex_liteeth.c    | 317 ++++++++++++++++++
 6 files changed, 451 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
 create mode 100644 drivers/net/ethernet/litex/Kconfig
 create mode 100644 drivers/net/ethernet/litex/Makefile
 create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c

-- 
2.33.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH
  2021-08-25 12:46 [PATCH v3 0/2] net: Add LiteETH network driver Joel Stanley
@ 2021-08-25 12:46 ` Joel Stanley
  2021-08-25 16:38   ` Rob Herring
  2021-08-25 12:46 ` [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface Joel Stanley
  1 sibling, 1 reply; 5+ messages in thread
From: Joel Stanley @ 2021-08-25 12:46 UTC (permalink / raw)
  To: David S . Miller, Jakub Kicinski, Rob Herring
  Cc: Karol Gugala, Mateusz Holenko, devicetree, Florent Kermarrec,
	Gabriel L . Somlo, netdev, linux-kernel

LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.

The hardware is parametrised by the size and number of the slots in it's
receive and send buffers. These are described as properties, with the
commonly used values set as the default.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
 - Fix dtschema check warning relating to registers
 - Add names to the registers to make it easier to distinguish which is
   what region
 - Add mdio description
 - Include ethernet-controller parent description
v3:
 - Define names for reg-names
 - update example to match common case
 - describe the hardware using slots and slot sizes. This is how the
   hardware is pramaterised, and it makes more sense than trying to use
   the rx/tx-fifo-size properties
---
 .../bindings/net/litex,liteeth.yaml           | 100 ++++++++++++++++++
 1 file changed, 100 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml

diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
new file mode 100644
index 000000000000..62911b8e913c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/litex,liteeth.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LiteX LiteETH ethernet device
+
+maintainers:
+  - Joel Stanley <joel@jms.id.au>
+
+description: |
+  LiteETH is a small footprint and configurable Ethernet core for FPGA based
+  system on chips.
+
+  The hardware source is Open Source and can be found on at
+  https://github.com/enjoy-digital/liteeth/.
+
+allOf:
+  - $ref: ethernet-controller.yaml#
+
+properties:
+  compatible:
+    const: litex,liteeth
+
+  reg:
+    minItems: 3
+    items:
+      - description: MAC registers
+      - description: MDIO registers
+      - description: Packet buffer
+
+  reg-names:
+    minItems: 3
+    items:
+      - const: mac
+      - const: mdio
+      - const: buffer
+
+  interrupts:
+    maxItems: 1
+
+  litex,rx-slots:
+    description: Number of slots in the receive buffer
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    default: 2
+
+  litex,tx-slots:
+    description: Number of slots in the transmit buffer
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    default: 2
+
+  litex,slot-size:
+    description: Size in bytes of a slot in the tx/rx buffer
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0x800
+    default: 0x800
+
+  mac-address: true
+  local-mac-address: true
+  phy-handle: true
+
+  mdio:
+    $ref: mdio.yaml#
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    mac: ethernet@8020000 {
+        compatible = "litex,liteeth";
+        reg = <0x8021000 0x100>,
+              <0x8020800 0x100>,
+              <0x8030000 0x2000>;
+        reg-names = "mac", "mdio", "buffer";
+        litex,rx-slots = <2>;
+        litex,tx-slots = <2>;
+        litex,slot-size = <0x800>;
+        interrupts = <0x11 0x1>;
+        phy-handle = <&eth_phy>;
+
+        mdio {
+          #address-cells = <1>;
+          #size-cells = <0>;
+
+          eth_phy: ethernet-phy@0 {
+            reg = <0>;
+          };
+        };
+    };
+...
+
+#  vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
-- 
2.33.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface
  2021-08-25 12:46 [PATCH v3 0/2] net: Add LiteETH network driver Joel Stanley
  2021-08-25 12:46 ` [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH Joel Stanley
@ 2021-08-25 12:46 ` Joel Stanley
  2021-08-25 22:04   ` Gabriel L. Somlo
  1 sibling, 1 reply; 5+ messages in thread
From: Joel Stanley @ 2021-08-25 12:46 UTC (permalink / raw)
  To: David S . Miller, Jakub Kicinski, Rob Herring
  Cc: Karol Gugala, Mateusz Holenko, devicetree, Florent Kermarrec,
	Gabriel L . Somlo, netdev, linux-kernel, David Shah,
	Stafford Horne

LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
network device that is commonly used in LiteX designs.

The driver was first written in 2017 and has been maintained by the
LiteX community in various trees. Thank you to all who have contributed.

Co-developed-by: Gabriel Somlo <gsomlo@gmail.com>
Co-developed-by: David Shah <dave@ds0.me>
Co-developed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
 - check for bad len in liteeth_rx before getting skb
 - use netdev_alloc_skb_ip_align
 - remove unused duplex/speed and mii_bus variables
 - set carrier off when stopping device
 - increment packet count in the same place as bytes
 - fix error return code when irq could not be found
 - remove request of mdio base address until it is used
 - fix of_property_read line wrapping/alignment
 - only check that reader isn't busy, and then send off next packet
 - drop third reset
 - Add an description to the kconfig text
 - stop tx queue when busy and re-start after tx complete irq fires
 - use litex accessors to support big endain socs
 - clean up unused includes
 - use standard fifo-depth properties, which are in bytes
v3:
 - make fifo helper static
 - fix error messages about invalid slot sizes
 - use slot size from device tree instead of inferring it
 - update to match the latest version of the bindings, which describes
   the number of slots
---
 drivers/net/ethernet/Kconfig               |   1 +
 drivers/net/ethernet/Makefile              |   1 +
 drivers/net/ethernet/litex/Kconfig         |  27 ++
 drivers/net/ethernet/litex/Makefile        |   5 +
 drivers/net/ethernet/litex/litex_liteeth.c | 317 +++++++++++++++++++++
 5 files changed, 351 insertions(+)
 create mode 100644 drivers/net/ethernet/litex/Kconfig
 create mode 100644 drivers/net/ethernet/litex/Makefile
 create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c

diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 1cdff1dca790..d796684ec9ca 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -118,6 +118,7 @@ config LANTIQ_XRX200
 	  Support for the PMAC of the Gigabit switch (GSWIP) inside the
 	  Lantiq / Intel VRX200 VDSL SoC
 
+source "drivers/net/ethernet/litex/Kconfig"
 source "drivers/net/ethernet/marvell/Kconfig"
 source "drivers/net/ethernet/mediatek/Kconfig"
 source "drivers/net/ethernet/mellanox/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index cb3f9084a21b..aaa5078cd7d1 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_JME) += jme.o
 obj-$(CONFIG_KORINA) += korina.o
 obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o
 obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o
+obj-$(CONFIG_NET_VENDOR_LITEX) += litex/
 obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/
 obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/
 obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/
diff --git a/drivers/net/ethernet/litex/Kconfig b/drivers/net/ethernet/litex/Kconfig
new file mode 100644
index 000000000000..265dba414b41
--- /dev/null
+++ b/drivers/net/ethernet/litex/Kconfig
@@ -0,0 +1,27 @@
+#
+# LiteX device configuration
+#
+
+config NET_VENDOR_LITEX
+	bool "LiteX devices"
+	default y
+	help
+	  If you have a network (Ethernet) card belonging to this class, say Y.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about LiteX devices. If you say Y, you will be asked
+	  for your specific card in the following questions.
+
+if NET_VENDOR_LITEX
+
+config LITEX_LITEETH
+	tristate "LiteX Ethernet support"
+	help
+	  If you wish to compile a kernel for hardware with a LiteX LiteEth
+	  device then you should answer Y to this.
+
+	  LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
+	  network device that is commonly used in LiteX designs.
+
+endif # NET_VENDOR_LITEX
diff --git a/drivers/net/ethernet/litex/Makefile b/drivers/net/ethernet/litex/Makefile
new file mode 100644
index 000000000000..9343b73b8e49
--- /dev/null
+++ b/drivers/net/ethernet/litex/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the LiteX network device drivers.
+#
+
+obj-$(CONFIG_LITEX_LITEETH) += litex_liteeth.o
diff --git a/drivers/net/ethernet/litex/litex_liteeth.c b/drivers/net/ethernet/litex/litex_liteeth.c
new file mode 100644
index 000000000000..10e6f2dedfad
--- /dev/null
+++ b/drivers/net/ethernet/litex/litex_liteeth.c
@@ -0,0 +1,317 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * LiteX Liteeth Ethernet
+ *
+ * Copyright 2017 Joel Stanley <joel@jms.id.au>
+ *
+ */
+
+#include <linux/etherdevice.h>
+#include <linux/interrupt.h>
+#include <linux/litex.h>
+#include <linux/module.h>
+#include <linux/of_net.h>
+#include <linux/platform_device.h>
+
+#define LITEETH_WRITER_SLOT       0x00
+#define LITEETH_WRITER_LENGTH     0x04
+#define LITEETH_WRITER_ERRORS     0x08
+#define LITEETH_WRITER_EV_STATUS  0x0C
+#define LITEETH_WRITER_EV_PENDING 0x10
+#define LITEETH_WRITER_EV_ENABLE  0x14
+#define LITEETH_READER_START      0x18
+#define LITEETH_READER_READY      0x1C
+#define LITEETH_READER_LEVEL      0x20
+#define LITEETH_READER_SLOT       0x24
+#define LITEETH_READER_LENGTH     0x28
+#define LITEETH_READER_EV_STATUS  0x2C
+#define LITEETH_READER_EV_PENDING 0x30
+#define LITEETH_READER_EV_ENABLE  0x34
+#define LITEETH_PREAMBLE_CRC      0x38
+#define LITEETH_PREAMBLE_ERRORS   0x3C
+#define LITEETH_CRC_ERRORS        0x40
+
+#define LITEETH_PHY_CRG_RESET     0x00
+#define LITEETH_MDIO_W            0x04
+#define LITEETH_MDIO_R            0x0C
+
+#define DRV_NAME	"liteeth"
+
+struct liteeth {
+	void __iomem *base;
+	struct net_device *netdev;
+	struct device *dev;
+	u32 slot_size;
+
+	/* Tx */
+	u32 tx_slot;
+	u32 num_tx_slots;
+	void __iomem *tx_base;
+
+	/* Rx */
+	u32 rx_slot;
+	u32 num_rx_slots;
+	void __iomem *rx_base;
+};
+
+static int liteeth_rx(struct net_device *netdev)
+{
+	struct liteeth *priv = netdev_priv(netdev);
+	struct sk_buff *skb;
+	unsigned char *data;
+	u8 rx_slot;
+	int len;
+
+	rx_slot = litex_read8(priv->base + LITEETH_WRITER_SLOT);
+	len = litex_read32(priv->base + LITEETH_WRITER_LENGTH);
+
+	if (len == 0 || len > 2048)
+		goto rx_drop;
+
+	skb = netdev_alloc_skb_ip_align(netdev, len);
+	if (!skb) {
+		netdev_err(netdev, "couldn't get memory\n");
+		goto rx_drop;
+	}
+
+	data = skb_put(skb, len);
+	memcpy_fromio(data, priv->rx_base + rx_slot * priv->slot_size, len);
+	skb->protocol = eth_type_trans(skb, netdev);
+
+	netdev->stats.rx_packets++;
+	netdev->stats.rx_bytes += len;
+
+	return netif_rx(skb);
+
+rx_drop:
+	netdev->stats.rx_dropped++;
+	netdev->stats.rx_errors++;
+
+	return NET_RX_DROP;
+}
+
+static irqreturn_t liteeth_interrupt(int irq, void *dev_id)
+{
+	struct net_device *netdev = dev_id;
+	struct liteeth *priv = netdev_priv(netdev);
+	u8 reg;
+
+	reg = litex_read8(priv->base + LITEETH_READER_EV_PENDING);
+	if (reg) {
+		if (netif_queue_stopped(netdev))
+			netif_wake_queue(netdev);
+		litex_write8(priv->base + LITEETH_READER_EV_PENDING, reg);
+	}
+
+	reg = litex_read8(priv->base + LITEETH_WRITER_EV_PENDING);
+	if (reg) {
+		liteeth_rx(netdev);
+		litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, reg);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int liteeth_open(struct net_device *netdev)
+{
+	struct liteeth *priv = netdev_priv(netdev);
+	int err;
+
+	/* Clear pending events */
+	litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, 1);
+	litex_write8(priv->base + LITEETH_READER_EV_PENDING, 1);
+
+	err = request_irq(netdev->irq, liteeth_interrupt, 0, netdev->name, netdev);
+	if (err) {
+		netdev_err(netdev, "failed to request irq %d\n", netdev->irq);
+		return err;
+	}
+
+	/* Enable IRQs */
+	litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 1);
+	litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 1);
+
+	netif_carrier_on(netdev);
+	netif_start_queue(netdev);
+
+	return 0;
+}
+
+static int liteeth_stop(struct net_device *netdev)
+{
+	struct liteeth *priv = netdev_priv(netdev);
+
+	netif_stop_queue(netdev);
+	netif_carrier_off(netdev);
+
+	litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 0);
+	litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 0);
+
+	free_irq(netdev->irq, netdev);
+
+	return 0;
+}
+
+static int liteeth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+	struct liteeth *priv = netdev_priv(netdev);
+	void __iomem *txbuffer;
+
+	if (!litex_read8(priv->base + LITEETH_READER_READY)) {
+		if (net_ratelimit())
+			netdev_err(netdev, "LITEETH_READER_READY not ready\n");
+
+		netif_stop_queue(netdev);
+
+		return NETDEV_TX_BUSY;
+	}
+
+	/* Reject oversize packets */
+	if (unlikely(skb->len > priv->slot_size)) {
+		if (net_ratelimit())
+			netdev_err(netdev, "tx packet too big\n");
+
+		dev_kfree_skb_any(skb);
+		netdev->stats.tx_dropped++;
+		netdev->stats.tx_errors++;
+
+		return NETDEV_TX_OK;
+	}
+
+	txbuffer = priv->tx_base + priv->tx_slot * priv->slot_size;
+	memcpy_toio(txbuffer, skb->data, skb->len);
+	litex_write8(priv->base + LITEETH_READER_SLOT, priv->tx_slot);
+	litex_write16(priv->base + LITEETH_READER_LENGTH, skb->len);
+	litex_write8(priv->base + LITEETH_READER_START, 1);
+
+	netdev->stats.tx_bytes += skb->len;
+	netdev->stats.tx_packets++;
+
+	priv->tx_slot = (priv->tx_slot + 1) % priv->num_tx_slots;
+	dev_kfree_skb_any(skb);
+
+	return NETDEV_TX_OK;
+}
+
+static const struct net_device_ops liteeth_netdev_ops = {
+	.ndo_open		= liteeth_open,
+	.ndo_stop		= liteeth_stop,
+	.ndo_start_xmit         = liteeth_start_xmit,
+};
+
+static void liteeth_setup_slots(struct liteeth *priv)
+{
+	struct device_node *np = priv->dev->of_node;
+	int err;
+
+	err = of_property_read_u32(np, "litex,rx-slots", &priv->num_rx_slots);
+	if (err) {
+		dev_dbg(priv->dev, "unable to get litex,rx-slots, using 2\n");
+		priv->num_rx_slots = 2;
+	}
+
+	err = of_property_read_u32(np, "litex,tx-slots", &priv->num_tx_slots);
+	if (err) {
+		dev_dbg(priv->dev, "unable to get litex,tx-slots, using 2\n");
+		priv->num_tx_slots = 2;
+	}
+
+	err = of_property_read_u32(np, "litex,slot-size", &priv->slot_size);
+	if (err) {
+		dev_dbg(priv->dev, "unable to get litex,slot-size, using 0x800\n");
+		priv->slot_size = 0x800;
+	}
+}
+
+static int liteeth_probe(struct platform_device *pdev)
+{
+	struct net_device *netdev;
+	void __iomem *buf_base;
+	struct resource *res;
+	struct liteeth *priv;
+	int irq, err;
+
+	netdev = devm_alloc_etherdev(&pdev->dev, sizeof(*priv));
+	if (!netdev)
+		return -ENOMEM;
+
+	SET_NETDEV_DEV(netdev, &pdev->dev);
+	platform_set_drvdata(pdev, netdev);
+
+	priv = netdev_priv(netdev);
+	priv->netdev = netdev;
+	priv->dev = &pdev->dev;
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "Failed to get IRQ %d\n", irq);
+		return irq;
+	}
+	netdev->irq = irq;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
+	priv->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "buffer");
+	buf_base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(buf_base))
+		return PTR_ERR(buf_base);
+
+	liteeth_setup_slots(priv);
+
+	/* Rx slots */
+	priv->rx_base = buf_base;
+	priv->rx_slot = 0;
+
+	/* Tx slots come after Rx slots */
+	priv->tx_base = buf_base + priv->num_rx_slots * priv->slot_size;
+	priv->tx_slot = 0;
+
+	err = of_get_mac_address(pdev->dev.of_node, netdev->dev_addr);
+	if (err)
+		eth_hw_addr_random(netdev);
+
+	netdev->netdev_ops = &liteeth_netdev_ops;
+
+	err = register_netdev(netdev);
+	if (err) {
+		dev_err(&pdev->dev, "Failed to register netdev %d\n", err);
+		return err;
+	}
+
+	netdev_info(netdev, "irq %d slots: tx %d rx %d size %d\n",
+		    netdev->irq, priv->num_tx_slots, priv->num_rx_slots, priv->slot_size);
+
+	return 0;
+}
+
+static int liteeth_remove(struct platform_device *pdev)
+{
+	struct net_device *netdev = platform_get_drvdata(pdev);
+
+	unregister_netdev(netdev);
+	free_netdev(netdev);
+
+	return 0;
+}
+
+static const struct of_device_id liteeth_of_match[] = {
+	{ .compatible = "litex,liteeth" },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, liteeth_of_match);
+
+static struct platform_driver liteeth_driver = {
+	.probe = liteeth_probe,
+	.remove = liteeth_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table = liteeth_of_match,
+	},
+};
+module_platform_driver(liteeth_driver);
+
+MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
+MODULE_LICENSE("GPL");
-- 
2.33.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH
  2021-08-25 12:46 ` [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH Joel Stanley
@ 2021-08-25 16:38   ` Rob Herring
  0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2021-08-25 16:38 UTC (permalink / raw)
  To: Joel Stanley
  Cc: David S . Miller, Jakub Kicinski, Karol Gugala, Mateusz Holenko,
	devicetree, Florent Kermarrec, Gabriel L . Somlo, netdev,
	linux-kernel

On Wed, Aug 25, 2021 at 10:16:54PM +0930, Joel Stanley wrote:
> LiteETH is a small footprint and configurable Ethernet core for FPGA
> based system on chips.
> 
> The hardware is parametrised by the size and number of the slots in it's
> receive and send buffers. These are described as properties, with the
> commonly used values set as the default.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
> v2:
>  - Fix dtschema check warning relating to registers
>  - Add names to the registers to make it easier to distinguish which is
>    what region
>  - Add mdio description
>  - Include ethernet-controller parent description
> v3:
>  - Define names for reg-names
>  - update example to match common case
>  - describe the hardware using slots and slot sizes. This is how the
>    hardware is pramaterised, and it makes more sense than trying to use
>    the rx/tx-fifo-size properties
> ---
>  .../bindings/net/litex,liteeth.yaml           | 100 ++++++++++++++++++
>  1 file changed, 100 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/litex,liteeth.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/litex,liteeth.yaml b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
> new file mode 100644
> index 000000000000..62911b8e913c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/litex,liteeth.yaml
> @@ -0,0 +1,100 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/litex,liteeth.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LiteX LiteETH ethernet device
> +
> +maintainers:
> +  - Joel Stanley <joel@jms.id.au>
> +
> +description: |
> +  LiteETH is a small footprint and configurable Ethernet core for FPGA based
> +  system on chips.
> +
> +  The hardware source is Open Source and can be found on at
> +  https://github.com/enjoy-digital/liteeth/.
> +
> +allOf:
> +  - $ref: ethernet-controller.yaml#
> +
> +properties:
> +  compatible:
> +    const: litex,liteeth
> +
> +  reg:
> +    minItems: 3

Don't need minItems if it is equal to 'items' length.

> +    items:
> +      - description: MAC registers
> +      - description: MDIO registers
> +      - description: Packet buffer
> +
> +  reg-names:
> +    minItems: 3

And here.

With that fixed:

Reviewed-by: Rob Herring <robh@kernel.org>

> +    items:
> +      - const: mac
> +      - const: mdio
> +      - const: buffer
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  litex,rx-slots:
> +    description: Number of slots in the receive buffer
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 1
> +    default: 2
> +
> +  litex,tx-slots:
> +    description: Number of slots in the transmit buffer
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 1
> +    default: 2
> +
> +  litex,slot-size:
> +    description: Size in bytes of a slot in the tx/rx buffer
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0x800
> +    default: 0x800
> +
> +  mac-address: true
> +  local-mac-address: true
> +  phy-handle: true
> +
> +  mdio:
> +    $ref: mdio.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    mac: ethernet@8020000 {
> +        compatible = "litex,liteeth";
> +        reg = <0x8021000 0x100>,
> +              <0x8020800 0x100>,
> +              <0x8030000 0x2000>;
> +        reg-names = "mac", "mdio", "buffer";
> +        litex,rx-slots = <2>;
> +        litex,tx-slots = <2>;
> +        litex,slot-size = <0x800>;
> +        interrupts = <0x11 0x1>;
> +        phy-handle = <&eth_phy>;
> +
> +        mdio {
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +
> +          eth_phy: ethernet-phy@0 {
> +            reg = <0>;
> +          };
> +        };
> +    };
> +...
> +
> +#  vim: set ts=2 sw=2 sts=2 tw=80 et cc=80 ft=yaml :
> -- 
> 2.33.0
> 
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface
  2021-08-25 12:46 ` [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface Joel Stanley
@ 2021-08-25 22:04   ` Gabriel L. Somlo
  0 siblings, 0 replies; 5+ messages in thread
From: Gabriel L. Somlo @ 2021-08-25 22:04 UTC (permalink / raw)
  To: Joel Stanley
  Cc: David S . Miller, Jakub Kicinski, Rob Herring, Karol Gugala,
	Mateusz Holenko, devicetree, Florent Kermarrec, netdev,
	linux-kernel, David Shah, Stafford Horne

On Wed, Aug 25, 2021 at 10:16:55PM +0930, Joel Stanley wrote:
> LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
> network device that is commonly used in LiteX designs.
> 
> The driver was first written in 2017 and has been maintained by the
> LiteX community in various trees. Thank you to all who have contributed.
> 
> Co-developed-by: Gabriel Somlo <gsomlo@gmail.com>
> Co-developed-by: David Shah <dave@ds0.me>
> Co-developed-by: Stafford Horne <shorne@gmail.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
> v2:
>  - check for bad len in liteeth_rx before getting skb
>  - use netdev_alloc_skb_ip_align
>  - remove unused duplex/speed and mii_bus variables
>  - set carrier off when stopping device
>  - increment packet count in the same place as bytes
>  - fix error return code when irq could not be found
>  - remove request of mdio base address until it is used
>  - fix of_property_read line wrapping/alignment
>  - only check that reader isn't busy, and then send off next packet
>  - drop third reset
>  - Add an description to the kconfig text
>  - stop tx queue when busy and re-start after tx complete irq fires
>  - use litex accessors to support big endain socs
>  - clean up unused includes
>  - use standard fifo-depth properties, which are in bytes
> v3:
>  - make fifo helper static
>  - fix error messages about invalid slot sizes
>  - use slot size from device tree instead of inferring it
>  - update to match the latest version of the bindings, which describes
>    the number of slots

LGTM -- thanks!

Tested-and-reviewed-by: Gabriel Somlo <gsomlo@gmail.com>

> ---
>  drivers/net/ethernet/Kconfig               |   1 +
>  drivers/net/ethernet/Makefile              |   1 +
>  drivers/net/ethernet/litex/Kconfig         |  27 ++
>  drivers/net/ethernet/litex/Makefile        |   5 +
>  drivers/net/ethernet/litex/litex_liteeth.c | 317 +++++++++++++++++++++
>  5 files changed, 351 insertions(+)
>  create mode 100644 drivers/net/ethernet/litex/Kconfig
>  create mode 100644 drivers/net/ethernet/litex/Makefile
>  create mode 100644 drivers/net/ethernet/litex/litex_liteeth.c
> 
> diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
> index 1cdff1dca790..d796684ec9ca 100644
> --- a/drivers/net/ethernet/Kconfig
> +++ b/drivers/net/ethernet/Kconfig
> @@ -118,6 +118,7 @@ config LANTIQ_XRX200
>  	  Support for the PMAC of the Gigabit switch (GSWIP) inside the
>  	  Lantiq / Intel VRX200 VDSL SoC
>  
> +source "drivers/net/ethernet/litex/Kconfig"
>  source "drivers/net/ethernet/marvell/Kconfig"
>  source "drivers/net/ethernet/mediatek/Kconfig"
>  source "drivers/net/ethernet/mellanox/Kconfig"
> diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
> index cb3f9084a21b..aaa5078cd7d1 100644
> --- a/drivers/net/ethernet/Makefile
> +++ b/drivers/net/ethernet/Makefile
> @@ -51,6 +51,7 @@ obj-$(CONFIG_JME) += jme.o
>  obj-$(CONFIG_KORINA) += korina.o
>  obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o
>  obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o
> +obj-$(CONFIG_NET_VENDOR_LITEX) += litex/
>  obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/
>  obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/
>  obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/
> diff --git a/drivers/net/ethernet/litex/Kconfig b/drivers/net/ethernet/litex/Kconfig
> new file mode 100644
> index 000000000000..265dba414b41
> --- /dev/null
> +++ b/drivers/net/ethernet/litex/Kconfig
> @@ -0,0 +1,27 @@
> +#
> +# LiteX device configuration
> +#
> +
> +config NET_VENDOR_LITEX
> +	bool "LiteX devices"
> +	default y
> +	help
> +	  If you have a network (Ethernet) card belonging to this class, say Y.
> +
> +	  Note that the answer to this question doesn't directly affect the
> +	  kernel: saying N will just cause the configurator to skip all
> +	  the questions about LiteX devices. If you say Y, you will be asked
> +	  for your specific card in the following questions.
> +
> +if NET_VENDOR_LITEX
> +
> +config LITEX_LITEETH
> +	tristate "LiteX Ethernet support"
> +	help
> +	  If you wish to compile a kernel for hardware with a LiteX LiteEth
> +	  device then you should answer Y to this.
> +
> +	  LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic
> +	  network device that is commonly used in LiteX designs.
> +
> +endif # NET_VENDOR_LITEX
> diff --git a/drivers/net/ethernet/litex/Makefile b/drivers/net/ethernet/litex/Makefile
> new file mode 100644
> index 000000000000..9343b73b8e49
> --- /dev/null
> +++ b/drivers/net/ethernet/litex/Makefile
> @@ -0,0 +1,5 @@
> +#
> +# Makefile for the LiteX network device drivers.
> +#
> +
> +obj-$(CONFIG_LITEX_LITEETH) += litex_liteeth.o
> diff --git a/drivers/net/ethernet/litex/litex_liteeth.c b/drivers/net/ethernet/litex/litex_liteeth.c
> new file mode 100644
> index 000000000000..10e6f2dedfad
> --- /dev/null
> +++ b/drivers/net/ethernet/litex/litex_liteeth.c
> @@ -0,0 +1,317 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * LiteX Liteeth Ethernet
> + *
> + * Copyright 2017 Joel Stanley <joel@jms.id.au>
> + *
> + */
> +
> +#include <linux/etherdevice.h>
> +#include <linux/interrupt.h>
> +#include <linux/litex.h>
> +#include <linux/module.h>
> +#include <linux/of_net.h>
> +#include <linux/platform_device.h>
> +
> +#define LITEETH_WRITER_SLOT       0x00
> +#define LITEETH_WRITER_LENGTH     0x04
> +#define LITEETH_WRITER_ERRORS     0x08
> +#define LITEETH_WRITER_EV_STATUS  0x0C
> +#define LITEETH_WRITER_EV_PENDING 0x10
> +#define LITEETH_WRITER_EV_ENABLE  0x14
> +#define LITEETH_READER_START      0x18
> +#define LITEETH_READER_READY      0x1C
> +#define LITEETH_READER_LEVEL      0x20
> +#define LITEETH_READER_SLOT       0x24
> +#define LITEETH_READER_LENGTH     0x28
> +#define LITEETH_READER_EV_STATUS  0x2C
> +#define LITEETH_READER_EV_PENDING 0x30
> +#define LITEETH_READER_EV_ENABLE  0x34
> +#define LITEETH_PREAMBLE_CRC      0x38
> +#define LITEETH_PREAMBLE_ERRORS   0x3C
> +#define LITEETH_CRC_ERRORS        0x40
> +
> +#define LITEETH_PHY_CRG_RESET     0x00
> +#define LITEETH_MDIO_W            0x04
> +#define LITEETH_MDIO_R            0x0C
> +
> +#define DRV_NAME	"liteeth"
> +
> +struct liteeth {
> +	void __iomem *base;
> +	struct net_device *netdev;
> +	struct device *dev;
> +	u32 slot_size;
> +
> +	/* Tx */
> +	u32 tx_slot;
> +	u32 num_tx_slots;
> +	void __iomem *tx_base;
> +
> +	/* Rx */
> +	u32 rx_slot;
> +	u32 num_rx_slots;
> +	void __iomem *rx_base;
> +};
> +
> +static int liteeth_rx(struct net_device *netdev)
> +{
> +	struct liteeth *priv = netdev_priv(netdev);
> +	struct sk_buff *skb;
> +	unsigned char *data;
> +	u8 rx_slot;
> +	int len;
> +
> +	rx_slot = litex_read8(priv->base + LITEETH_WRITER_SLOT);
> +	len = litex_read32(priv->base + LITEETH_WRITER_LENGTH);
> +
> +	if (len == 0 || len > 2048)
> +		goto rx_drop;
> +
> +	skb = netdev_alloc_skb_ip_align(netdev, len);
> +	if (!skb) {
> +		netdev_err(netdev, "couldn't get memory\n");
> +		goto rx_drop;
> +	}
> +
> +	data = skb_put(skb, len);
> +	memcpy_fromio(data, priv->rx_base + rx_slot * priv->slot_size, len);
> +	skb->protocol = eth_type_trans(skb, netdev);
> +
> +	netdev->stats.rx_packets++;
> +	netdev->stats.rx_bytes += len;
> +
> +	return netif_rx(skb);
> +
> +rx_drop:
> +	netdev->stats.rx_dropped++;
> +	netdev->stats.rx_errors++;
> +
> +	return NET_RX_DROP;
> +}
> +
> +static irqreturn_t liteeth_interrupt(int irq, void *dev_id)
> +{
> +	struct net_device *netdev = dev_id;
> +	struct liteeth *priv = netdev_priv(netdev);
> +	u8 reg;
> +
> +	reg = litex_read8(priv->base + LITEETH_READER_EV_PENDING);
> +	if (reg) {
> +		if (netif_queue_stopped(netdev))
> +			netif_wake_queue(netdev);
> +		litex_write8(priv->base + LITEETH_READER_EV_PENDING, reg);
> +	}
> +
> +	reg = litex_read8(priv->base + LITEETH_WRITER_EV_PENDING);
> +	if (reg) {
> +		liteeth_rx(netdev);
> +		litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, reg);
> +	}
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int liteeth_open(struct net_device *netdev)
> +{
> +	struct liteeth *priv = netdev_priv(netdev);
> +	int err;
> +
> +	/* Clear pending events */
> +	litex_write8(priv->base + LITEETH_WRITER_EV_PENDING, 1);
> +	litex_write8(priv->base + LITEETH_READER_EV_PENDING, 1);
> +
> +	err = request_irq(netdev->irq, liteeth_interrupt, 0, netdev->name, netdev);
> +	if (err) {
> +		netdev_err(netdev, "failed to request irq %d\n", netdev->irq);
> +		return err;
> +	}
> +
> +	/* Enable IRQs */
> +	litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 1);
> +	litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 1);
> +
> +	netif_carrier_on(netdev);
> +	netif_start_queue(netdev);
> +
> +	return 0;
> +}
> +
> +static int liteeth_stop(struct net_device *netdev)
> +{
> +	struct liteeth *priv = netdev_priv(netdev);
> +
> +	netif_stop_queue(netdev);
> +	netif_carrier_off(netdev);
> +
> +	litex_write8(priv->base + LITEETH_WRITER_EV_ENABLE, 0);
> +	litex_write8(priv->base + LITEETH_READER_EV_ENABLE, 0);
> +
> +	free_irq(netdev->irq, netdev);
> +
> +	return 0;
> +}
> +
> +static int liteeth_start_xmit(struct sk_buff *skb, struct net_device *netdev)
> +{
> +	struct liteeth *priv = netdev_priv(netdev);
> +	void __iomem *txbuffer;
> +
> +	if (!litex_read8(priv->base + LITEETH_READER_READY)) {
> +		if (net_ratelimit())
> +			netdev_err(netdev, "LITEETH_READER_READY not ready\n");
> +
> +		netif_stop_queue(netdev);
> +
> +		return NETDEV_TX_BUSY;
> +	}
> +
> +	/* Reject oversize packets */
> +	if (unlikely(skb->len > priv->slot_size)) {
> +		if (net_ratelimit())
> +			netdev_err(netdev, "tx packet too big\n");
> +
> +		dev_kfree_skb_any(skb);
> +		netdev->stats.tx_dropped++;
> +		netdev->stats.tx_errors++;
> +
> +		return NETDEV_TX_OK;
> +	}
> +
> +	txbuffer = priv->tx_base + priv->tx_slot * priv->slot_size;
> +	memcpy_toio(txbuffer, skb->data, skb->len);
> +	litex_write8(priv->base + LITEETH_READER_SLOT, priv->tx_slot);
> +	litex_write16(priv->base + LITEETH_READER_LENGTH, skb->len);
> +	litex_write8(priv->base + LITEETH_READER_START, 1);
> +
> +	netdev->stats.tx_bytes += skb->len;
> +	netdev->stats.tx_packets++;
> +
> +	priv->tx_slot = (priv->tx_slot + 1) % priv->num_tx_slots;
> +	dev_kfree_skb_any(skb);
> +
> +	return NETDEV_TX_OK;
> +}
> +
> +static const struct net_device_ops liteeth_netdev_ops = {
> +	.ndo_open		= liteeth_open,
> +	.ndo_stop		= liteeth_stop,
> +	.ndo_start_xmit         = liteeth_start_xmit,
> +};
> +
> +static void liteeth_setup_slots(struct liteeth *priv)
> +{
> +	struct device_node *np = priv->dev->of_node;
> +	int err;
> +
> +	err = of_property_read_u32(np, "litex,rx-slots", &priv->num_rx_slots);
> +	if (err) {
> +		dev_dbg(priv->dev, "unable to get litex,rx-slots, using 2\n");
> +		priv->num_rx_slots = 2;
> +	}
> +
> +	err = of_property_read_u32(np, "litex,tx-slots", &priv->num_tx_slots);
> +	if (err) {
> +		dev_dbg(priv->dev, "unable to get litex,tx-slots, using 2\n");
> +		priv->num_tx_slots = 2;
> +	}
> +
> +	err = of_property_read_u32(np, "litex,slot-size", &priv->slot_size);
> +	if (err) {
> +		dev_dbg(priv->dev, "unable to get litex,slot-size, using 0x800\n");
> +		priv->slot_size = 0x800;
> +	}
> +}
> +
> +static int liteeth_probe(struct platform_device *pdev)
> +{
> +	struct net_device *netdev;
> +	void __iomem *buf_base;
> +	struct resource *res;
> +	struct liteeth *priv;
> +	int irq, err;
> +
> +	netdev = devm_alloc_etherdev(&pdev->dev, sizeof(*priv));
> +	if (!netdev)
> +		return -ENOMEM;
> +
> +	SET_NETDEV_DEV(netdev, &pdev->dev);
> +	platform_set_drvdata(pdev, netdev);
> +
> +	priv = netdev_priv(netdev);
> +	priv->netdev = netdev;
> +	priv->dev = &pdev->dev;
> +
> +	irq = platform_get_irq(pdev, 0);
> +	if (irq < 0) {
> +		dev_err(&pdev->dev, "Failed to get IRQ %d\n", irq);
> +		return irq;
> +	}
> +	netdev->irq = irq;
> +
> +	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
> +	priv->base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "buffer");
> +	buf_base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(buf_base))
> +		return PTR_ERR(buf_base);
> +
> +	liteeth_setup_slots(priv);
> +
> +	/* Rx slots */
> +	priv->rx_base = buf_base;
> +	priv->rx_slot = 0;
> +
> +	/* Tx slots come after Rx slots */
> +	priv->tx_base = buf_base + priv->num_rx_slots * priv->slot_size;
> +	priv->tx_slot = 0;
> +
> +	err = of_get_mac_address(pdev->dev.of_node, netdev->dev_addr);
> +	if (err)
> +		eth_hw_addr_random(netdev);
> +
> +	netdev->netdev_ops = &liteeth_netdev_ops;
> +
> +	err = register_netdev(netdev);
> +	if (err) {
> +		dev_err(&pdev->dev, "Failed to register netdev %d\n", err);
> +		return err;
> +	}
> +
> +	netdev_info(netdev, "irq %d slots: tx %d rx %d size %d\n",
> +		    netdev->irq, priv->num_tx_slots, priv->num_rx_slots, priv->slot_size);
> +
> +	return 0;
> +}
> +
> +static int liteeth_remove(struct platform_device *pdev)
> +{
> +	struct net_device *netdev = platform_get_drvdata(pdev);
> +
> +	unregister_netdev(netdev);
> +	free_netdev(netdev);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id liteeth_of_match[] = {
> +	{ .compatible = "litex,liteeth" },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, liteeth_of_match);
> +
> +static struct platform_driver liteeth_driver = {
> +	.probe = liteeth_probe,
> +	.remove = liteeth_remove,
> +	.driver = {
> +		.name = DRV_NAME,
> +		.of_match_table = liteeth_of_match,
> +	},
> +};
> +module_platform_driver(liteeth_driver);
> +
> +MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
> +MODULE_LICENSE("GPL");
> -- 
> 2.33.0
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-08-25 22:04 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-25 12:46 [PATCH v3 0/2] net: Add LiteETH network driver Joel Stanley
2021-08-25 12:46 ` [PATCH v3 1/2] dt-bindings: net: Add bindings for LiteETH Joel Stanley
2021-08-25 16:38   ` Rob Herring
2021-08-25 12:46 ` [PATCH v3 2/2] net: Add driver for LiteX's LiteETH network interface Joel Stanley
2021-08-25 22:04   ` Gabriel L. Somlo

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