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From: Maxime Ripard <maxime@cerno.tech>
To: Samuel Holland <samuel@sholland.org>
Cc: Icenowy Zheng <icenowy@sipeed.com>,
Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Andre Przywara <andre.przywara@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 11/17] clk: sunxi-ng: add support for Allwinner R329 CCU
Date: Wed, 25 Aug 2021 16:54:34 +0200 [thread overview]
Message-ID: <20210825145434.vdrhgrgblnnmvmve@gilmour> (raw)
In-Reply-To: <3e56e53f-e6df-50cf-5545-e9132e521ed1@sholland.org>
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On Thu, Aug 19, 2021 at 09:41:26PM -0500, Samuel Holland wrote:
> On 8/2/21 1:22 AM, Icenowy Zheng wrote:
> > Allwinner R329 has a CCU that is similar to the H616 one, but it's cut
> > down and have PLLs moved out.
> >
> > Add support for it.
> >
> > Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
> > ---
> > drivers/clk/sunxi-ng/Kconfig | 5 +
> > drivers/clk/sunxi-ng/Makefile | 1 +
> > drivers/clk/sunxi-ng/ccu-sun50i-r329.c | 526 ++++++++++++++++++++
> > drivers/clk/sunxi-ng/ccu-sun50i-r329.h | 32 ++
> > include/dt-bindings/clock/sun50i-r329-ccu.h | 73 +++
> > include/dt-bindings/reset/sun50i-r329-ccu.h | 45 ++
> > 6 files changed, 682 insertions(+)
> > create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-r329.c
> > create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-r329.h
> > create mode 100644 include/dt-bindings/clock/sun50i-r329-ccu.h
> > create mode 100644 include/dt-bindings/reset/sun50i-r329-ccu.h
> >
> > diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
> > index e49b2c2fa5b7..4b32d5f81ea8 100644
> > --- a/drivers/clk/sunxi-ng/Kconfig
> > +++ b/drivers/clk/sunxi-ng/Kconfig
> > @@ -42,6 +42,11 @@ config SUN50I_H6_R_CCU
> > default ARM64 && ARCH_SUNXI
> > depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> >
> > +config SUN50I_R329_CCU
> > + bool "Support for the Allwinner R329 CCU"
> > + default ARM64 && ARCH_SUNXI
> > + depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
> > +
> > config SUN50I_R329_R_CCU
> > bool "Support for the Allwinner R329 PRCM CCU"
> > default ARM64 && ARCH_SUNXI
> > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> > index db338a2188fd..62f3c5bf331c 100644
> > --- a/drivers/clk/sunxi-ng/Makefile
> > +++ b/drivers/clk/sunxi-ng/Makefile
> > @@ -28,6 +28,7 @@ obj-$(CONFIG_SUN50I_A100_R_CCU) += ccu-sun50i-a100-r.o
> > obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o
> > obj-$(CONFIG_SUN50I_H616_CCU) += ccu-sun50i-h616.o
> > obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o
> > +obj-$(CONFIG_SUN50I_R329_CCU) += ccu-sun50i-r329.o
> > obj-$(CONFIG_SUN50I_R329_R_CCU) += ccu-sun50i-r329-r.o
> > obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o
> > obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o
> > diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-r329.c b/drivers/clk/sunxi-ng/ccu-sun50i-r329.c
> > new file mode 100644
> > index 000000000000..a0b4cfd6e1db
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu-sun50i-r329.c
> > @@ -0,0 +1,526 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Based on the H616 CCU driver, which is:
> > + * Copyright (c) 2020 Arm Ltd.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/of_address.h>
> > +#include <linux/platform_device.h>
> > +
> > +#include "ccu_common.h"
> > +#include "ccu_reset.h"
> > +
> > +#include "ccu_div.h"
> > +#include "ccu_gate.h"
> > +#include "ccu_mp.h"
> > +#include "ccu_mult.h"
> > +#include "ccu_nk.h"
> > +#include "ccu_nkm.h"
> > +#include "ccu_nkmp.h"
> > +#include "ccu_nm.h"
> > +
> > +#include "ccu-sun50i-r329.h"
> > +
> > +/*
> > + * An external divider of PLL-CPUX is controlled here. As it's similar to
> > + * the external divider of PLL-CPUX on previous SoCs (only usable under
> > + * 288MHz}, ignore it.
>
> Mismatched (braces} here
>
> > + */
> > +static const char * const cpux_parents[] = { "osc24M", "osc32k", "iosc",
> > + "pll-cpux", "pll-periph",
> > + "pll-periph-2x",
> > + "pll=periph-800m" };
>
> = should be a -.
>
> Now that these PLLs are in a different device, how is this supposed to affect
> the DT binding? Do we put all of them in the clocks property?
>
> If so, we can use .fw_name at some point. If not, why bother with the clocks
> property at all? This is another part of the "let's get the clock tree right
> from the start" discussion.
Agreed
Maxime
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next prev parent reply other threads:[~2021-08-25 14:54 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-02 6:21 [PATCH 00/17] Basical Allwinner R329 support Icenowy Zheng
2021-08-02 6:21 ` [PATCH 01/17] rtc: sun6i: Fix time overflow handling Icenowy Zheng
2021-08-02 6:21 ` [PATCH 02/17] rtc: sun6i: Add support for linear day storage Icenowy Zheng
2021-08-02 6:21 ` [PATCH 03/17] rtc: sun6i: Add support for broken-down alarm registers Icenowy Zheng
2021-08-02 6:21 ` [PATCH 04/17] dt-bindings: rtc: sun6i: add compatible string for R329 RTC Icenowy Zheng
2021-08-06 21:39 ` Rob Herring
2021-08-02 6:22 ` [PATCH 05/17] rtc: sun6i: add support " Icenowy Zheng
2021-08-02 6:22 ` [PATCH 06/17] dt-bindings: pinctrl: document Allwinner R329 PIO and R-PIO Icenowy Zheng
2021-08-06 21:40 ` Rob Herring
2021-08-18 8:48 ` Maxime Ripard
2021-08-19 2:40 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 07/17] pinctrl: sunxi: add support for R329 CPUX pin controller Icenowy Zheng
2021-08-11 9:23 ` Linus Walleij
2021-08-18 8:48 ` Maxime Ripard
2021-08-19 3:09 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 08/17] pinctrl: sunxi: add support for R329 R-PIO " Icenowy Zheng
2021-08-18 8:52 ` Maxime Ripard
2021-08-19 3:22 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 09/17] dt-bindings: clock: sunxi-ng: add compatibles for R329 CCUs Icenowy Zheng
2021-08-06 21:41 ` Rob Herring
2021-08-02 6:22 ` [PATCH 10/17] clk: sunxi=ng: add support for R329 R-CCU Icenowy Zheng
2021-08-06 21:42 ` Rob Herring
2021-08-18 8:50 ` Maxime Ripard
2021-08-20 0:55 ` Samuel Holland
2021-08-20 4:34 ` Jernej Škrabec
2021-08-25 14:50 ` Maxime Ripard
2021-08-25 15:03 ` Jernej Škrabec
2021-08-25 15:37 ` Maxime Ripard
2021-08-26 0:20 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 11/17] clk: sunxi-ng: add support for Allwinner R329 CCU Icenowy Zheng
2021-08-06 21:42 ` Rob Herring
2021-08-20 2:41 ` Samuel Holland
2021-08-25 14:54 ` Maxime Ripard [this message]
2021-08-02 6:22 ` [PATCH 12/17] dt-bindings: mmc: sunxi-mmc: add R329 MMC compatible string Icenowy Zheng
2021-08-06 21:42 ` Rob Herring
2021-08-18 8:47 ` Maxime Ripard
2021-08-02 6:22 ` [PATCH 13/17] mmc: sunxi: add support for R329 MMC controllers Icenowy Zheng
2021-08-18 8:47 ` Maxime Ripard
2021-08-20 2:43 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 14/17] dt-bindings: arm: sunxi: add compatible strings for Sipeed MaixSense Icenowy Zheng
2021-08-06 21:43 ` Rob Herring
2021-08-18 9:03 ` Maxime Ripard
2021-08-02 6:22 ` [PATCH 15/17] arm64: allwinner: dts: add DTSI file for R329 SoC Icenowy Zheng
2021-08-18 9:01 ` Maxime Ripard
[not found] ` <74F51516-2470-4A49-972B-E19D8EDD9A3D@sipeed.com>
2021-08-19 2:32 ` Samuel Holland
2021-08-20 3:06 ` Samuel Holland
2021-08-25 15:00 ` Maxime Ripard
2021-08-20 2:59 ` Samuel Holland
2021-08-02 6:22 ` [PATCH 16/17] arm64: allwinner: dts: r329: add DTSI file for Sipeed Maix IIA Icenowy Zheng
2021-08-02 6:22 ` [PATCH 17/17] arm64: allwinner: dts: r329: add support for Sipeed MaixSense Icenowy Zheng
2021-08-10 11:04 ` [PATCH 00/17] Basical Allwinner R329 support Ulf Hansson
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