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From: Billy Tsai <billy_tsai@aspeedtech.com>
To: <jic23@kernel.org>, <lars@metafoo.de>, <pmeerw@pmeerw.net>,
<robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>,
<p.zabel@pengutronix.de>, <lgirdwood@gmail.com>,
<broonie@kernel.org>, <linux-iio@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>
Cc: <BMC-SW@aspeedtech.com>, kernel test robot <lkp@intel.com>
Subject: [v5 08/15] iio: adc: aspeed: Use model_data to set clk scaler.
Date: Tue, 31 Aug 2021 15:14:51 +0800 [thread overview]
Message-ID: <20210831071458.2334-9-billy_tsai@aspeedtech.com> (raw)
In-Reply-To: <20210831071458.2334-1-billy_tsai@aspeedtech.com>
This patch uses need_prescaler and scaler_bit_width to set the ADC clock
scaler.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
---
drivers/iio/adc/aspeed_adc.c | 43 ++++++++++++++++++++++--------------
1 file changed, 27 insertions(+), 16 deletions(-)
diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c
index aec335956310..e53d1541ad1d 100644
--- a/drivers/iio/adc/aspeed_adc.c
+++ b/drivers/iio/adc/aspeed_adc.c
@@ -210,9 +210,10 @@ static int aspeed_adc_probe(struct platform_device *pdev)
{
struct iio_dev *indio_dev;
struct aspeed_adc_data *data;
- const char *clk_parent_name;
int ret;
u32 adc_engine_control_reg_val;
+ unsigned long scaler_flags = 0;
+ char clk_name[32], clk_parent_name[32];
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*data));
if (!indio_dev)
@@ -229,24 +230,32 @@ static int aspeed_adc_probe(struct platform_device *pdev)
/* Register ADC clock prescaler with source specified by device tree. */
spin_lock_init(&data->clk_lock);
- clk_parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
-
- data->clk_prescaler = clk_hw_register_divider(
- &pdev->dev, "prescaler", clk_parent_name, 0,
- data->base + ASPEED_REG_CLOCK_CONTROL,
- 17, 15, 0, &data->clk_lock);
- if (IS_ERR(data->clk_prescaler))
- return PTR_ERR(data->clk_prescaler);
-
+ snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name), "%s",
+ of_clk_get_parent_name(pdev->dev.of_node, 0));
+
+ if (data->model_data->need_prescaler) {
+ snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-prescaler",
+ data->model_data->model_name);
+ data->clk_prescaler = clk_hw_register_divider(
+ &pdev->dev, clk_name, clk_parent_name, 0,
+ data->base + ASPEED_REG_CLOCK_CONTROL, 17, 15, 0,
+ &data->clk_lock);
+ if (IS_ERR(data->clk_prescaler))
+ return PTR_ERR(data->clk_prescaler);
+ snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name),
+ clk_name);
+ scaler_flags = CLK_SET_RATE_PARENT;
+ }
/*
* Register ADC clock scaler downstream from the prescaler. Allow rate
* setting to adjust the prescaler as well.
*/
+ snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-scaler",
+ data->model_data->model_name);
data->clk_scaler = clk_hw_register_divider(
- &pdev->dev, "scaler", "prescaler",
- CLK_SET_RATE_PARENT,
- data->base + ASPEED_REG_CLOCK_CONTROL,
- 0, 10, 0, &data->clk_lock);
+ &pdev->dev, clk_name, clk_parent_name, scaler_flags,
+ data->base + ASPEED_REG_CLOCK_CONTROL, 0,
+ data->model_data->scaler_bit_width, 0, &data->clk_lock);
if (IS_ERR(data->clk_scaler)) {
ret = PTR_ERR(data->clk_scaler);
goto scaler_error;
@@ -318,7 +327,8 @@ static int aspeed_adc_probe(struct platform_device *pdev)
reset_error:
clk_hw_unregister_divider(data->clk_scaler);
scaler_error:
- clk_hw_unregister_divider(data->clk_prescaler);
+ if (data->model_data->need_prescaler)
+ clk_hw_unregister_divider(data->clk_prescaler);
return ret;
}
@@ -333,7 +343,8 @@ static int aspeed_adc_remove(struct platform_device *pdev)
clk_disable_unprepare(data->clk_scaler->clk);
reset_control_assert(data->rst);
clk_hw_unregister_divider(data->clk_scaler);
- clk_hw_unregister_divider(data->clk_prescaler);
+ if (data->model_data->need_prescaler)
+ clk_hw_unregister_divider(data->clk_prescaler);
return 0;
}
--
2.25.1
next prev parent reply other threads:[~2021-08-31 7:16 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-31 7:14 [v5 00/15] Add support for ast2600 ADC Billy Tsai
2021-08-31 7:14 ` [v5 01/15] iio: adc: aspeed: set driver data when adc probe Billy Tsai
2021-09-05 14:25 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 02/15] dt-bindings: iio: adc: Add ast2600-adc bindings Billy Tsai
2021-09-01 1:38 ` Rob Herring
2021-09-05 14:27 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 03/15] iio: adc: aspeed: completes the bitfield declare Billy Tsai
2021-09-05 14:30 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 04/15] iio: adc: aspeed: Keep model data to driver data Billy Tsai
2021-09-05 14:33 ` Jonathan Cameron
2021-09-05 14:50 ` Jonathan Cameron
2021-09-16 3:52 ` Joel Stanley
2021-09-18 17:55 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 05/15] iio: adc: aspeed: Refactory model data structure Billy Tsai
2021-09-05 14:37 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 06/15] iio: adc: aspeed: Add vref config function Billy Tsai
2021-08-31 7:14 ` [v5 07/15] iio: adc: aspeed: Set num_channels with model data Billy Tsai
2021-08-31 7:14 ` Billy Tsai [this message]
2021-08-31 7:14 ` [v5 09/15] iio: adc: aspeed: Use devm_add_action_or_reset Billy Tsai
2021-08-31 7:51 ` Philipp Zabel
2021-08-31 7:14 ` [v5 10/15] iio: adc: aspeed: Support ast2600 adc Billy Tsai
2021-08-31 7:14 ` [v5 11/15] iio: adc: aspeed: Fix the calculate error of clock Billy Tsai
2021-09-05 14:47 ` Jonathan Cameron
2021-08-31 7:14 ` [v5 12/15] iio: adc: aspeed: Add func to set sampling rate Billy Tsai
2021-08-31 7:14 ` [v5 13/15] iio: adc: aspeed: Add compensation phase Billy Tsai
2021-08-31 7:14 ` [v5 14/15] iio: adc: aspeed: Support battery sensing Billy Tsai
2021-08-31 7:14 ` [v5 15/15] iio: adc: aspeed: Get and set trimming data Billy Tsai
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