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From: Maxime Ripard <maxime@cerno.tech> To: Andre Przywara <andre.przywara@arm.com> Cc: Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Rob Herring <robh@kernel.org>, Icenowy Zheng <icenowy@aosc.io>, Samuel Holland <samuel@sholland.org>, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Ondrej Jirman <megous@megous.com>, devicetree@vger.kernel.org, Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com>, linux-rtc@vger.kernel.org Subject: Re: [PATCH v8 02/11] dt-bindings: rtc: sun6i: Add H616 compatible string Date: Wed, 1 Sep 2021 09:21:23 +0200 [thread overview] Message-ID: <20210901072123.gqfua52rupsrmtks@gilmour> (raw) In-Reply-To: <20210818100407.7cf7cfb7@slackpad.fritz.box> [-- Attachment #1: Type: text/plain, Size: 5114 bytes --] On Wed, Aug 18, 2021 at 10:04:07AM +0100, Andre Przywara wrote: > On Tue, 17 Aug 2021 09:38:10 +0200 > Maxime Ripard <maxime@cerno.tech> wrote: > > Hi Maxime, > > > On Mon, Aug 02, 2021 at 01:39:38AM +0100, Andre Przywara wrote: > > > On Mon, 26 Jul 2021 16:41:37 +0200 > > > Maxime Ripard <maxime@cerno.tech> wrote: > > > > > > > Hi, > > > > > > > > On Fri, Jul 23, 2021 at 04:38:29PM +0100, Andre Przywara wrote: > > > > > Add the obvious compatible name to the existing RTC binding. > > > > > The actual RTC part of the device uses a different day/month/year > > > > > storage scheme, so it's not compatible with the previous devices. > > > > > Also the clock part is quite different, as there is no external 32K LOSC > > > > > oscillator input. > > > > > > > > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > > > > > > > > > --- > > > > > .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 14 ++++++++++++++ > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml > > > > > index beeb90e55727..d8a6500e5840 100644 > > > > > --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml > > > > > +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml > > > > > @@ -26,6 +26,7 @@ properties: > > > > > - const: allwinner,sun50i-a64-rtc > > > > > - const: allwinner,sun8i-h3-rtc > > > > > - const: allwinner,sun50i-h6-rtc > > > > > + - const: allwinner,sun50i-h616-rtc > > > > > > > > > > reg: > > > > > maxItems: 1 > > > > > @@ -104,6 +105,19 @@ allOf: > > > > > minItems: 3 > > > > > maxItems: 3 > > > > > > > > > > + - if: > > > > > + properties: > > > > > + compatible: > > > > > + contains: > > > > > + const: allwinner,sun50i-h616-rtc > > > > > + > > > > > + then: > > > > > + properties: > > > > > + clock-output-names: > > > > > + minItems: 3 > > > > > + maxItems: 3 > > > > > > > > You don't need both of them when they are equal > > > > > > > > > + clocks: false > > > > > + > > > > > > > > It's not entirely clear to me what those clocks are about though. If we > > > > look at the clock output in the user manual, it looks like there's only > > > > two clocks that are actually being output: the 32k "fanout" clock and > > > > the losc. What are the 3 you're talking about?] > > > > > > I see three: the raw SYSTEM "CLK32K_LOSC", the RTC input + debounce > > > clock (/32), and the multiplexed PAD. > > > > But the input and debounce clock is only for the RTC itself right? So it > > should be local to the driver and doesn't need to be made available to > > the other drivers > > I understood "debounce" as being the clock used for the pinctrl > debouncer. What would it debounce otherwise? Do you think that this > "debounce circuit" is something internal to the RTC and is totally > irrelevant for us? I don't think that's it. The Debounce circuit is after the 32 divider, so we have a clock rate of 1kHz (Figure 3-35, page 275) The PIO Interrupt debouncing can use either a 32kHz or 24MHz clock, so the rates don't match, and given the naming would rather be clocked from CLK32K_LOSC. The DCXO_CTRL_REG (Section 3.13.6.13) hints at something different though, it says: " CLK16M_RC_EN 1: Enable 0: Disable The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M. " I'm not sure why it would be useful for though > But in general I looked at how many *different* clocks this diagram > describes, and I count: one unaltered ("SYSTEM"), one "div by > 32" (RTC/debounce), and one multiplexed. My aim was to avoid > DT binding changes when we later discover we do need one of them for > something (as happened in the past). So three seemed to be the safe > choice here, to avoid surprises. In the worst case we just will never > reference one of them. My concern is the pretty much the opposite: if we ever need to remove it for whatever reason, if it's in the DT, we can't. While we can totally add it if we need it. > > Either way, what this list is must be documented. > > You mean to overwrite the "description" stanza for clock-output-names? Yes > And can this be done in the per-SoC parts in the later part of the > binding, keeping the existing description? Sure Maxime [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2021-09-01 7:21 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-23 15:38 [PATCH v8 00/11] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara 2021-07-23 15:38 ` [PATCH v8 01/11] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara 2021-08-16 12:39 ` Lee Jones 2021-07-23 15:38 ` [PATCH v8 02/11] dt-bindings: rtc: sun6i: Add H616 compatible string Andre Przywara 2021-07-23 22:34 ` Rob Herring 2021-07-26 14:41 ` Maxime Ripard 2021-08-02 0:39 ` Andre Przywara 2021-08-17 7:38 ` Maxime Ripard 2021-08-17 8:13 ` Alexandre Belloni 2021-08-19 7:56 ` Maxime Ripard 2021-08-18 9:04 ` Andre Przywara 2021-08-20 3:57 ` Samuel Holland 2021-09-01 7:21 ` Maxime Ripard [this message] 2021-07-23 15:38 ` [PATCH v8 03/11] rtc: sun6i: Fix time overflow handling Andre Przywara 2021-07-25 5:44 ` Jernej Škrabec 2021-07-23 15:38 ` [PATCH v8 04/11] rtc: sun6i: Add support for linear day storage Andre Przywara 2021-07-25 5:51 ` Jernej Škrabec 2021-07-23 15:38 ` [PATCH v8 05/11] rtc: sun6i: Add support for broken-down alarm registers Andre Przywara 2021-07-25 6:11 ` Jernej Škrabec 2021-08-02 0:39 ` Andre Przywara 2021-07-23 15:38 ` [PATCH v8 06/11] rtc: sun6i: Add support for RTCs without external LOSCs Andre Przywara 2021-07-25 6:18 ` Jernej Škrabec 2021-07-23 15:38 ` [PATCH v8 07/11] rtc: sun6i: Add Allwinner H616 support Andre Przywara 2021-07-25 6:19 ` Jernej Škrabec 2021-07-23 15:38 ` [PATCH v8 08/11] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara 2021-07-23 15:38 ` [PATCH v8 09/11] dt-bindings: arm: sunxi: Add two H616 board compatible strings Andre Przywara 2021-07-23 15:38 ` [PATCH v8 10/11] arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support Andre Przywara 2021-07-23 15:38 ` [PATCH v8 11/11] arm64: dts: allwinner: h616: Add X96 Mate TV box support Andre Przywara 2021-07-25 16:41 ` [PATCH v8 00/11] arm64: sunxi: Initial Allwinner H616 SoC support Icenowy Zheng 2021-07-26 14:52 ` Maxime Ripard 2021-08-02 0:38 ` Andre Przywara 2021-08-17 7:30 ` Maxime Ripard
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