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From: guoren@kernel.org
To: anup.patel@wdc.com, atish.patra@wdc.com,
palmerdabbelt@google.com, guoren@kernel.org,
christoph.muellner@vrull.eu, philipp.tomsich@vrull.eu,
hch@lst.de, liush@allwinnertech.com, wefu@redhat.com,
lazyparser@gmail.com, drew@beagleboard.org
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
Guo Ren <guoren@linux.alibaba.com>,
Andrew Morton <akpm@linux-foundation.org>,
Arnd Bergmann <arnd@arndb.de>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: [RFC PATCH V4 1/6] riscv: pgtable: Add custom protection_map init
Date: Sat, 11 Sep 2021 17:21:34 +0800 [thread overview]
Message-ID: <20210911092139.79607-2-guoren@kernel.org> (raw)
In-Reply-To: <20210911092139.79607-1-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
Some RISC-V CPU vendors have defined their own PTE attributes to
solve non-coherent DMA bus problems. That makes _P/SXXX definitions
contain global variables which could be initialized at the early
boot stage before setup_vm. The patch prevents compile errors.
This patch is similar to 316d097c4cd4 (x86/pti: Filter at
vma->vm_page_prot population) which give a choice for arch custom
implementation.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
---
arch/riscv/Kconfig | 4 ++++
arch/riscv/mm/init.c | 22 ++++++++++++++++++++++
mm/mmap.c | 4 ++++
3 files changed, 30 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 4f7b70ae7c31..3ab3730bee92 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -25,6 +25,7 @@ config RISCV
select ARCH_HAS_GIGANTIC_PAGE
select ARCH_HAS_KCOV
select ARCH_HAS_MMIOWB
+ select ARCH_HAS_PROTECTION_MAP_INIT
select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_SET_DIRECT_MAP if MMU
select ARCH_HAS_SET_MEMORY if MMU
@@ -201,6 +202,9 @@ config GENERIC_HWEIGHT
config FIX_EARLYCON_MEM
def_bool MMU
+config ARCH_HAS_PROTECTION_MAP_INIT
+ def_bool y
+
config PGTABLE_LEVELS
int
default 3 if 64BIT
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 7cb4f391d106..975c7322d6c4 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -550,6 +550,26 @@ static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size,
}
#endif
+static void __init setup_protection_map(void)
+{
+ protection_map[0] = __P000;
+ protection_map[1] = __P001;
+ protection_map[2] = __P010;
+ protection_map[3] = __P011;
+ protection_map[4] = __P100;
+ protection_map[5] = __P101;
+ protection_map[6] = __P110;
+ protection_map[7] = __P111;
+ protection_map[8] = __S000;
+ protection_map[9] = __S001;
+ protection_map[10] = __S010;
+ protection_map[11] = __S011;
+ protection_map[12] = __S100;
+ protection_map[13] = __S101;
+ protection_map[14] = __S110;
+ protection_map[15] = __S111;
+}
+
asmlinkage void __init setup_vm(uintptr_t dtb_pa)
{
uintptr_t __maybe_unused pa;
@@ -558,6 +578,8 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
pmd_t fix_bmap_spmd, fix_bmap_epmd;
#endif
+ setup_protection_map();
+
kernel_map.virt_addr = KERNEL_LINK_ADDR;
#ifdef CONFIG_XIP_KERNEL
diff --git a/mm/mmap.c b/mm/mmap.c
index 181a113b545d..6d74537122ad 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -100,10 +100,14 @@ static void unmap_region(struct mm_struct *mm,
* w: (no) no
* x: (yes) yes
*/
+#ifdef CONFIG_ARCH_HAS_PROTECTION_MAP_INIT
+pgprot_t protection_map[16] __ro_after_init;
+#else
pgprot_t protection_map[16] __ro_after_init = {
__P000, __P001, __P010, __P011, __P100, __P101, __P110, __P111,
__S000, __S001, __S010, __S011, __S100, __S101, __S110, __S111
};
+#endif
#ifndef CONFIG_ARCH_HAS_FILTER_PGPROT
static inline pgprot_t arch_filter_pgprot(pgprot_t prot)
--
2.25.1
next prev parent reply other threads:[~2021-09-11 9:22 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-11 9:21 [RFC PATCH V4 0/6] riscv: Add PBMT & DMA for D1 bringup guoren
2021-09-11 9:21 ` guoren [this message]
2021-09-15 7:45 ` [RFC PATCH V4 1/6] riscv: pgtable: Add custom protection_map init Christoph Hellwig
2021-09-15 23:52 ` Guo Ren
2021-09-11 9:21 ` [RFC PATCH V4 2/6] riscv: errata: pgtable: Add custom Svpbmt supported for Allwinner D1 guoren
2021-09-15 7:47 ` Christoph Hellwig
2021-09-16 0:48 ` Guo Ren
2021-09-16 7:31 ` Atish Patra
2021-09-11 9:21 ` [RFC PATCH V4 3/6] RISC-V: Support a new config option for non-coherent DMA guoren
2021-09-15 7:48 ` Christoph Hellwig
2021-09-16 1:20 ` Guo Ren
2021-09-16 4:39 ` Atish Patra
2021-09-16 6:09 ` Guo Ren
2021-09-11 9:21 ` [RFC PATCH V4 4/6] RISC-V: Implement arch_sync_dma* functions guoren
2021-09-15 7:50 ` Christoph Hellwig
2021-09-16 1:32 ` Guo Ren
2021-09-16 4:24 ` Anup Patel
2021-09-16 4:42 ` Atish Patra
2021-09-11 9:21 ` [RFC PATCH V4 5/6] riscv: errata: Support T-HEAD custom dcache ops guoren
2021-09-11 9:21 ` [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option guoren
2021-09-13 8:45 ` Maxime Ripard
2021-09-13 9:20 ` Guo Ren
2021-09-13 18:48 ` Randy Dunlap
2021-09-14 2:34 ` Guo Ren
2021-09-14 3:06 ` Randy Dunlap
2021-09-14 5:16 ` Anup Patel
2021-09-14 5:20 ` Randy Dunlap
2021-09-14 9:29 ` Arnd Bergmann
2021-09-14 10:07 ` Krzysztof Kozlowski
2021-09-14 10:13 ` Maxime Ripard
2021-09-14 12:09 ` Krzysztof Kozlowski
2021-09-14 13:02 ` Arnd Bergmann
2021-09-16 6:37 ` Guo Ren
2021-09-14 3:49 ` Heinrich Schuchardt
2021-09-14 5:16 ` Samuel Holland
2021-09-14 6:30 ` Heinrich Schuchardt
2021-09-14 7:20 ` Maxime Ripard
2021-09-14 9:26 ` Ben Dooks
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