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From: Sudeep Holla <sudeep.holla@arm.com>
To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Sudeep Holla <sudeep.holla@arm.com>,
	Cristian Marussi <cristian.marussi@arm.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Jassi Brar <jassisinghbrar@gmail.com>
Subject: [PATCH v2 11/14] mailbox: pcc: Drop handling invalid bit-width in {read,write}_register
Date: Fri, 17 Sep 2021 14:33:54 +0100	[thread overview]
Message-ID: <20210917133357.1911092-12-sudeep.holla@arm.com> (raw)
In-Reply-To: <20210917133357.1911092-1-sudeep.holla@arm.com>

pcc_chan_reg_init now checks if the register bit width is within the
list [8, 16, 32, 64] and flags error if that is not the case. Therefore
there is no need to handling invalid bit-width in both read_register
and write_register. We can drop that along with the return values for
these 2 functions.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
 drivers/mailbox/pcc.c | 24 ++++--------------------
 1 file changed, 4 insertions(+), 20 deletions(-)

diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c
index ed635f7d3f60..4bace1fa48f0 100644
--- a/drivers/mailbox/pcc.c
+++ b/drivers/mailbox/pcc.c
@@ -110,10 +110,8 @@ static struct mbox_controller pcc_mbox_ctrl = {};
  * The below read_register and write_registers are used to read and
  * write from perf critical registers such as PCC doorbell register
  */
-static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
+static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
 {
-	int ret_val = 0;
-
 	switch (bit_width) {
 	case 8:
 		*val = readb(vaddr);
@@ -127,19 +125,11 @@ static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
 	case 64:
 		*val = readq(vaddr);
 		break;
-	default:
-		pr_debug("Error: Cannot read register of %u bit width",
-			bit_width);
-		ret_val = -EFAULT;
-		break;
 	}
-	return ret_val;
 }
 
-static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
+static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
 {
-	int ret_val = 0;
-
 	switch (bit_width) {
 	case 8:
 		writeb(val, vaddr);
@@ -153,13 +143,7 @@ static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
 	case 64:
 		writeq(val, vaddr);
 		break;
-	default:
-		pr_debug("Error: Cannot write register of %u bit width",
-			bit_width);
-		ret_val = -EFAULT;
-		break;
 	}
-	return ret_val;
 }
 
 static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
@@ -172,7 +156,7 @@ static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
 	}
 
 	if (reg->vaddr)
-		ret = read_register(reg->vaddr, val, reg->gas->bit_width);
+		read_register(reg->vaddr, val, reg->gas->bit_width);
 	else
 		ret = acpi_read(val, reg->gas);
 
@@ -187,7 +171,7 @@ static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
 		return 0;
 
 	if (reg->vaddr)
-		ret = write_register(reg->vaddr, val, reg->gas->bit_width);
+		write_register(reg->vaddr, val, reg->gas->bit_width);
 	else
 		ret = acpi_write(val, reg->gas);
 
-- 
2.25.1


  parent reply	other threads:[~2021-09-17 13:34 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17 13:33 [PATCH v2 00/14] mailbox: pcc: Add support for PCCT extended PCC subspaces Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 01/14] mailbox: pcc: Fix kernel doc warnings Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 02/14] ACPI: CPPC: " Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 03/14] mailbox: pcc: Refactor all PCC channel information into a structure Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 04/14] mailbox: pcc: Consolidate subspace interrupt information parsing Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 05/14] mailbox: pcc: Consolidate subspace doorbell register parsing Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 06/14] mailbox: pcc: Add pcc_mbox_chan structure to hold shared memory region info Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 07/14] mailbox: pcc: Use PCC mailbox channel pointer instead of standard Sudeep Holla
2021-10-04 20:05   ` Wolfram Sang
2021-10-11 10:07   ` Sudeep Holla
2021-10-11 14:08   ` Guenter Roeck
2021-09-17 13:33 ` [PATCH v2 08/14] mailbox: pcc: Rename doorbell ack to platform interrupt ack register Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 09/14] mailbox: pcc: Add PCC register bundle and associated accessor functions Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 10/14] mailbox: pcc: Avoid accessing PCCT table in pcc_send_data and pcc_mbox_irq Sudeep Holla
2021-09-17 13:33 ` Sudeep Holla [this message]
2021-09-17 13:33 ` [PATCH v2 12/14] mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4) Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 13/14] mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe Sudeep Holla
2021-09-17 13:33 ` [PATCH v2 14/14] ACPI/PCC: Add myself as maintainer for PCC mailbox driver Sudeep Holla
2021-09-17 15:10   ` Rafael J. Wysocki
2021-10-11 10:09 ` [PATCH v2 00/14] mailbox: pcc: Add support for PCCT extended PCC subspaces Sudeep Holla
2021-10-21 16:54   ` Sudeep Holla
2021-10-22 15:05     ` Jassi Brar
2021-10-22 17:09       ` Sudeep Holla

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