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From: Bjorn Helgaas <>
To: Kai-Heng Feng <>
Subject: Re: [RFC] [PATCH net-next v5 0/3] r8169: Implement dynamic ASPM mechanism for recent 1.0/2.5Gbps Realtek NICs
Date: Fri, 17 Sep 2021 17:09:42 -0500	[thread overview]
Message-ID: <20210917220942.GA1748301@bjorn-Precision-5520> (raw)
In-Reply-To: <>

On Thu, Sep 16, 2021 at 11:44:14PM +0800, Kai-Heng Feng wrote:
> The purpose of the series is to get comments and reviews so we can merge
> and test the series in downstream kernel.
> The latest Realtek vendor driver and its Windows driver implements a
> feature called "dynamic ASPM" which can improve performance on it's
> ethernet NICs.
> Heiner Kallweit pointed out the potential root cause can be that the
> buffer is too small for its ASPM exit latency.

I looked at the lspci data in your bugzilla

L1.2 is enabled, which requires the Latency Tolerance Reporting
capability, which helps determine when the Link will be put in L1.2.
IIUC, these are analogous to the DevCap "Acceptable Latency" values.
Zero latency values indicate the device will be impacted by any delay
(PCIe r5.0, sec 6.18).

Linux does not currently program those values, so the values there
must have been set by the BIOS.  On the working AMD system, they're
set to 1048576ns, while on the broken Intel system, they're set to

I don't really understand how these values should be computed, and I
think they depend on some electrical characteristics of the Link, so
I'm not sure it's *necessarily* a problem that they are different.
But a 3X difference does seem pretty large.

So I'm curious whether this is related to the problem.  Here are some
things we could try on the broken Intel system:

  - What happens if you disable ASPM L1.2 using

  - If that doesn't work, what happens if you also disable PCI-PM L1.2
    using /sys/devices/pci*/.../link/l1_2_pcipm?

  - If either of the above makes things work, then at least we know
    the problem is sensitive to L1.2.

  - Then what happens if you use setpci to set the LTR Latency
    registers to 0, then re-enable ASPM L1.2 and PCI-PM L1.2?  This
    should mean the Realtek device wants the best possible service and
    the Link probably won't spend much time in L1.2.

  - What happens if you set the LTR Latency registers to 0x1001
    (should be the same as on the AMD system)?

  parent reply	other threads:[~2021-09-17 22:09 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-16 15:44 Kai-Heng Feng
2021-09-16 15:44 ` [RFC] [PATCH net-next v5 1/3] PCI/ASPM: Introduce a new helper to report ASPM capability Kai-Heng Feng
2021-09-16 15:44 ` [RFC] [PATCH net-next v5 2/3] r8169: Use PCIe ASPM status for NIC ASPM enablement Kai-Heng Feng
2021-09-16 17:07   ` Bjorn Helgaas
2021-09-17  4:09     ` Kai-Heng Feng
2021-09-17 15:26       ` Bjorn Helgaas
2021-10-01  4:32         ` Kai-Heng Feng
2021-09-16 15:44 ` [RFC] [PATCH net-next v5 3/3] r8169: Implement dynamic ASPM mechanism Kai-Heng Feng
2021-09-16 17:12   ` Bjorn Helgaas
2021-09-17  4:19     ` Kai-Heng Feng
2021-09-17 22:09 ` Bjorn Helgaas [this message]
2021-10-01  4:17   ` [RFC] [PATCH net-next v5 0/3] r8169: Implement dynamic ASPM mechanism for recent 1.0/2.5Gbps Realtek NICs Kai-Heng Feng
2021-10-07 19:10     ` Bjorn Helgaas
2021-10-08 13:56     ` Bjorn Helgaas

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