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From: Shawn Guo <shawn.guo@linaro.org>
To: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Shawn Guo <shawn.guo@linaro.org>
Subject: [PATCH 08/10] arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes
Date: Wed, 29 Sep 2021 11:42:51 +0800	[thread overview]
Message-ID: <20210929034253.24570-9-shawn.guo@linaro.org> (raw)
In-Reply-To: <20210929034253.24570-1-shawn.guo@linaro.org>

IPQ8074 PCIe PHY nodes are broken in the many ways:

- '#address-cells', '#size-cells' and 'ranges' are missing.
- Child phy/lane node is missing, and the child properties like
  '#phy-cells' and 'clocks' are mistakenly put into parent node.
- The clocks properties for parent node are missing.

Fix them to get the nodes comply with the bindings schema.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 46 +++++++++++++++++++++------
 1 file changed, 36 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 2e4e1399e276..dfdd3e4a4087 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -174,34 +174,60 @@
 			status = "disabled";
 		};
 
-		pcie_phy0: phy@86000 {
+		pcie_qmp0: phy@86000 {
 			compatible = "qcom,ipq8074-qmp-pcie-phy";
 			reg = <0x00086000 0x1000>;
-			#phy-cells = <0>;
-			clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
-			clock-names = "pipe_clk";
-			clock-output-names = "pcie20_phy0_pipe_clk";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
 
+			clocks = <&gcc GCC_PCIE0_AUX_CLK>,
+				<&gcc GCC_PCIE0_AHB_CLK>;
+			clock-names = "aux", "cfg_ahb";
 			resets = <&gcc GCC_PCIE0_PHY_BCR>,
 				<&gcc GCC_PCIE0PHY_PHY_BCR>;
 			reset-names = "phy",
 				      "common";
 			status = "disabled";
+
+			pcie_phy0: phy@86200 {
+				reg = <0x86200 0x16c>,
+				      <0x86400 0x200>,
+				      <0x86800 0x4f4>;
+				#phy-cells = <0>;
+				#clock-cells = <0>;
+				clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
+				clock-names = "pipe0";
+				clock-output-names = "pcie_0_pipe_clk";
+			};
 		};
 
-		pcie_phy1: phy@8e000 {
+		pcie_qmp1: phy@8e000 {
 			compatible = "qcom,ipq8074-qmp-pcie-phy";
 			reg = <0x0008e000 0x1000>;
-			#phy-cells = <0>;
-			clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
-			clock-names = "pipe_clk";
-			clock-output-names = "pcie20_phy1_pipe_clk";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
 
+			clocks = <&gcc GCC_PCIE1_AUX_CLK>,
+				<&gcc GCC_PCIE1_AHB_CLK>;
+			clock-names = "aux", "cfg_ahb";
 			resets = <&gcc GCC_PCIE1_PHY_BCR>,
 				<&gcc GCC_PCIE1PHY_PHY_BCR>;
 			reset-names = "phy",
 				      "common";
 			status = "disabled";
+
+			pcie_phy1: phy@8e200 {
+				reg = <0x8e200 0x16c>,
+				      <0x8e400 0x200>,
+				      <0x8e800 0x4f4>;
+				#phy-cells = <0>;
+				#clock-cells = <0>;
+				clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
+				clock-names = "pipe0";
+				clock-output-names = "pcie_1_pipe_clk";
+			};
 		};
 
 		prng: rng@e3000 {
-- 
2.17.1


  parent reply	other threads:[~2021-09-29  3:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-29  3:42 [PATCH 00/10] Make Qualcomm QMP PHY dtbs_check warning free Shawn Guo
2021-09-29  3:42 ` [PATCH 01/10] dt-bindings: phy: qcom,qmp: '#clock-cells' is not required for parent node Shawn Guo
2021-10-04 18:41   ` Rob Herring
2021-10-05  6:34   ` Vinod Koul
2021-09-29  3:42 ` [PATCH 02/10] dt-bindings: phy: qcom,qmp: IPQ6018 and IPQ8074 PCIe PHY require no supply Shawn Guo
2021-10-04 18:43   ` Rob Herring
2021-10-05  6:34   ` Vinod Koul
2021-10-05 15:47     ` Bjorn Andersson
2021-10-07  8:56       ` Vinod Koul
2021-10-19 18:07         ` Vinod Koul
2021-10-20 13:06   ` [PATCH RESEND " Shawn Guo
2021-10-20 15:33     ` Vinod Koul
2021-09-29  3:42 ` [PATCH 03/10] arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node Shawn Guo
2021-09-29  3:42 ` [PATCH 04/10] arm64: dts: qcom: Correct QMP PHY child node name Shawn Guo
2021-09-29  3:42 ` [PATCH 05/10] arm64: dts: qcom: Drop max-microamp and vddp-ref-clk properties from QMP PHY Shawn Guo
2021-09-29  3:42 ` [PATCH 06/10] arm64: dts: qcom: Drop reg-names from QMP PHY nodes Shawn Guo
2021-09-29  3:42 ` [PATCH 07/10] arm64: dts: qcom: msm8998-clamshell: Add missing vdda supplies Shawn Guo
2021-09-29  3:42 ` Shawn Guo [this message]
2021-09-29  3:42 ` [PATCH 09/10] arm64: dts: qcom: ipq8074-hk01: Add dummy supply for QMP USB3 PHY Shawn Guo
2021-09-29  3:42 ` [PATCH 10/10] ARM: dts: qcom: sdx55: Drop '#clock-cells' from QMP PHY node Shawn Guo

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