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* [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts
@ 2021-09-28 21:35 Brian Norris
  2021-09-28 21:35 ` [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Brian Norris
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: Brian Norris @ 2021-09-28 21:35 UTC (permalink / raw)
  To: Heiko Stübner
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris, aleksandr.o.makarov

The Rockchip DSI driver has had a number of bugs over time and has
usually only worked by chance. A number of users have noticed that
things regressed with commit 43c2de1002d2 ("drm/rockchip: dsi: move all
lane config except LCDC mux to bind()"), although it was fixing several
real issues of its own that had been present forever in the upstream
driver (but notably, not in the downstream/BSP driver).

Patch 1 and 2 are the most important fixes here. See their description
for more info.

While I'm at it, fix a few error handling and cleanup issues too.

Changes in v3:
 - New patch, to fix related PM issue discovered after patch 1

Changes in v2:
- Clean up pm-runtime state in error cases.
- Correct git hash for Fixes.

Brian Norris (4):
  drm/rockchip: dsi: Hold pm-runtime across bind/unbind
  drm/rockchip: dsi: Reconfigure hardware on resume()
  drm/rockchip: dsi: Fix unbalanced clock on probe error
  drm/rockchip: dsi: Disable PLL clock on bind error

 .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 82 +++++++++++++------
 1 file changed, 59 insertions(+), 23 deletions(-)

-- 
2.33.0.685.g46640cef36-goog


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind
  2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
@ 2021-09-28 21:35 ` Brian Norris
  2021-09-29  2:27   ` Chen-Yu Tsai
  2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 12+ messages in thread
From: Brian Norris @ 2021-09-28 21:35 UTC (permalink / raw)
  To: Heiko Stübner
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris, aleksandr.o.makarov,
	stable, Nícolas F . R . A . Prado

In commit 43c2de1002d2, we moved most HW configuration to bind(), but we
didn't move the runtime PM management. Therefore, depending on initial
boot state, runtime-PM workqueue delays, and other timing factors, we
may disable our power domain in between the hardware configuration
(bind()) and when we enable the display. This can cause us to lose
hardware state and fail to configure our display. For example:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-innolux-p079zca ff960000.mipi.0: failed to write command 0

or:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110

We should match the runtime PM to the lifetime of the bind()/unbind()
cycle.

Tested on Acer Chrometab 10 (RK3399 Gru-Scarlet), with panel drivers
built either as modules or built-in.

Side notes: it seems one is more likely to see this problem when the
panel driver is built into the kernel. I've also seen this problem
bisect down to commits that simply changed Kconfig dependencies, because
it changed the order in which driver init functions were compiled into
the kernel, and therefore the ordering and timing of built-in device
probe.

Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
Link: https://lore.kernel.org/linux-rockchip/9aedfb528600ecf871885f7293ca4207c84d16c1.camel@gmail.com/
Reported-by: <aleksandr.o.makarov@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
---

(no changes since v2)

Changes in v2:
- Clean up pm-runtime state in error cases.
- Correct git hash for Fixes.

 .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 37 ++++++++++---------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index a2262bee5aa4..45676b23c019 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -773,10 +773,6 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
 	if (mux < 0)
 		return;
 
-	pm_runtime_get_sync(dsi->dev);
-	if (dsi->slave)
-		pm_runtime_get_sync(dsi->slave->dev);
-
 	/*
 	 * For the RK3399, the clk of grf must be enabled before writing grf
 	 * register. And for RK3288 or other soc, this grf_clk must be NULL,
@@ -795,20 +791,10 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
 	clk_disable_unprepare(dsi->grf_clk);
 }
 
-static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
-{
-	struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder);
-
-	if (dsi->slave)
-		pm_runtime_put(dsi->slave->dev);
-	pm_runtime_put(dsi->dev);
-}
-
 static const struct drm_encoder_helper_funcs
 dw_mipi_dsi_encoder_helper_funcs = {
 	.atomic_check = dw_mipi_dsi_encoder_atomic_check,
 	.enable = dw_mipi_dsi_encoder_enable,
-	.disable = dw_mipi_dsi_encoder_disable,
 };
 
 static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi,
@@ -938,10 +924,14 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 		put_device(second);
 	}
 
+	pm_runtime_get_sync(dsi->dev);
+	if (dsi->slave)
+		pm_runtime_get_sync(dsi->slave->dev);
+
 	ret = clk_prepare_enable(dsi->pllref_clk);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "Failed to enable pllref_clk: %d\n", ret);
-		return ret;
+		goto out_pm_runtime;
 	}
 
 	/*
@@ -953,7 +943,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 	ret = clk_prepare_enable(dsi->grf_clk);
 	if (ret) {
 		DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
-		return ret;
+		goto out_pm_runtime;
 	}
 
 	dw_mipi_dsi_rockchip_config(dsi);
@@ -965,16 +955,23 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 	ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "Failed to create drm encoder\n");
-		return ret;
+		goto out_pm_runtime;
 	}
 
 	ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
-		return ret;
+		goto out_pm_runtime;
 	}
 
 	return 0;
+
+out_pm_runtime:
+	pm_runtime_put(dsi->dev);
+	if (dsi->slave)
+		pm_runtime_put(dsi->slave->dev);
+
+	return ret;
 }
 
 static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
@@ -989,6 +986,10 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
 	dw_mipi_dsi_unbind(dsi->dmd);
 
 	clk_disable_unprepare(dsi->pllref_clk);
+
+	pm_runtime_put(dsi->dev);
+	if (dsi->slave)
+		pm_runtime_put(dsi->slave->dev);
 }
 
 static const struct component_ops dw_mipi_dsi_rockchip_ops = {
-- 
2.33.0.685.g46640cef36-goog


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume()
  2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
  2021-09-28 21:35 ` [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Brian Norris
@ 2021-09-28 21:35 ` Brian Norris
  2021-09-29  2:28   ` Chen-Yu Tsai
                     ` (2 more replies)
  2021-09-28 21:35 ` [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error Brian Norris
                   ` (2 subsequent siblings)
  4 siblings, 3 replies; 12+ messages in thread
From: Brian Norris @ 2021-09-28 21:35 UTC (permalink / raw)
  To: Heiko Stübner
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris, stable

Since commit 43c2de1002d2, we perform most HW configuration in the
bind() function. This configuration may be lost on suspend/resume, so we
need to call it again. That may lead to errors like this after system
suspend/resume:

  dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
  panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110

Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).

Note that early mailing list versions of this driver borrowed Rockchip's
downstream/BSP solution, to do HW configuration in mode_set() (which
*is* called at the appropriate pre-enable() times), but that was
discarded along the way. I've avoided that still, because mode_set()
documentation doesn't suggest this kind of purpose as far as I can tell.

Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
---

Changes in v3:
 - New patch, to fix related PM issue discovered after patch 1

 .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 45676b23c019..21c67343cc6c 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -268,6 +268,8 @@ struct dw_mipi_dsi_rockchip {
 	struct dw_mipi_dsi *dmd;
 	const struct rockchip_dw_dsi_chip_data *cdata;
 	struct dw_mipi_dsi_plat_data pdata;
+
+	bool dsi_bound;
 };
 
 struct dphy_pll_parameter_map {
@@ -964,6 +966,8 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 		goto out_pm_runtime;
 	}
 
+	dsi->dsi_bound = true;
+
 	return 0;
 
 out_pm_runtime:
@@ -983,6 +987,8 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
 	if (dsi->is_slave)
 		return;
 
+	dsi->dsi_bound = false;
+
 	dw_mipi_dsi_unbind(dsi->dmd);
 
 	clk_disable_unprepare(dsi->pllref_clk);
@@ -1277,6 +1283,36 @@ static const struct phy_ops dw_mipi_dsi_dphy_ops = {
 	.exit		= dw_mipi_dsi_dphy_exit,
 };
 
+static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev)
+{
+	struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev);
+	int ret;
+
+	/*
+	 * Re-configure DSI state, if we were previously initialized. We need
+	 * to do this before rockchip_drm_drv tries to re-enable() any panels.
+	 */
+	if (dsi->dsi_bound) {
+		ret = clk_prepare_enable(dsi->grf_clk);
+		if (ret) {
+			DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
+			return ret;
+		}
+
+		dw_mipi_dsi_rockchip_config(dsi);
+		if (dsi->slave)
+			dw_mipi_dsi_rockchip_config(dsi->slave);
+
+		clk_disable_unprepare(dsi->grf_clk);
+	}
+
+	return 0;
+}
+
+static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = {
+	SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume)
+};
+
 static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -1594,6 +1630,7 @@ struct platform_driver dw_mipi_dsi_rockchip_driver = {
 	.remove		= dw_mipi_dsi_rockchip_remove,
 	.driver		= {
 		.of_match_table = dw_mipi_dsi_rockchip_dt_ids,
+		.pm	= &dw_mipi_dsi_rockchip_pm_ops,
 		.name	= "dw-mipi-dsi-rockchip",
 	},
 };
-- 
2.33.0.685.g46640cef36-goog


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error
  2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
  2021-09-28 21:35 ` [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Brian Norris
  2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
@ 2021-09-28 21:35 ` Brian Norris
  2021-09-29 18:09   ` Nícolas F. R. A. Prado
  2021-09-28 21:35 ` [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error Brian Norris
  2021-10-17 21:52 ` [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Heiko Stuebner
  4 siblings, 1 reply; 12+ messages in thread
From: Brian Norris @ 2021-09-28 21:35 UTC (permalink / raw)
  To: Heiko Stübner
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris

Our probe() function never enabled this clock, so we shouldn't disable
it if we fail to probe the bridge.

Noted by inspection.

Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
---

(no changes since v1)

 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 21c67343cc6c..8ea852880d1c 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -1434,14 +1434,10 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
 		if (ret != -EPROBE_DEFER)
 			DRM_DEV_ERROR(dev,
 				      "Failed to probe dw_mipi_dsi: %d\n", ret);
-		goto err_clkdisable;
+		return ret;
 	}
 
 	return 0;
-
-err_clkdisable:
-	clk_disable_unprepare(dsi->pllref_clk);
-	return ret;
 }
 
 static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev)
-- 
2.33.0.685.g46640cef36-goog


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error
  2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
                   ` (2 preceding siblings ...)
  2021-09-28 21:35 ` [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error Brian Norris
@ 2021-09-28 21:35 ` Brian Norris
  2021-09-29 18:10   ` Nícolas F. R. A. Prado
  2021-10-17 21:52 ` [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Heiko Stuebner
  4 siblings, 1 reply; 12+ messages in thread
From: Brian Norris @ 2021-09-28 21:35 UTC (permalink / raw)
  To: Heiko Stübner
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris

Fix some error handling here noticed in review of other changes.

Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reported-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
---

Changes in v3:
- Add Fixes, Reviewed-by

Changes in v2:
- New

 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index 8ea852880d1c..59c3d8ef6bf9 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -945,7 +945,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 	ret = clk_prepare_enable(dsi->grf_clk);
 	if (ret) {
 		DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
-		goto out_pm_runtime;
+		goto out_pll_clk;
 	}
 
 	dw_mipi_dsi_rockchip_config(dsi);
@@ -957,19 +957,21 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
 	ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "Failed to create drm encoder\n");
-		goto out_pm_runtime;
+		goto out_pll_clk;
 	}
 
 	ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
-		goto out_pm_runtime;
+		goto out_pll_clk;
 	}
 
 	dsi->dsi_bound = true;
 
 	return 0;
 
+out_pll_clk:
+	clk_disable_unprepare(dsi->pllref_clk);
 out_pm_runtime:
 	pm_runtime_put(dsi->dev);
 	if (dsi->slave)
-- 
2.33.0.685.g46640cef36-goog


^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind
  2021-09-28 21:35 ` [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Brian Norris
@ 2021-09-29  2:27   ` Chen-Yu Tsai
  0 siblings, 0 replies; 12+ messages in thread
From: Chen-Yu Tsai @ 2021-09-29  2:27 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stübner, LKML, dri-devel,
	open list:ARM/Rockchip SoC...,
	Sandy Huang, Thomas Hebb, aleksandr.o.makarov, stable,
	Nícolas F . R . A . Prado

On Wed, Sep 29, 2021 at 5:36 AM Brian Norris <briannorris@chromium.org> wrote:
>
> In commit 43c2de1002d2, we moved most HW configuration to bind(), but we
> didn't move the runtime PM management. Therefore, depending on initial
> boot state, runtime-PM workqueue delays, and other timing factors, we
> may disable our power domain in between the hardware configuration
> (bind()) and when we enable the display. This can cause us to lose
> hardware state and fail to configure our display. For example:
>
>   dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
>   panel-innolux-p079zca ff960000.mipi.0: failed to write command 0
>
> or:
>
>   dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
>   panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110
>
> We should match the runtime PM to the lifetime of the bind()/unbind()
> cycle.
>
> Tested on Acer Chrometab 10 (RK3399 Gru-Scarlet), with panel drivers
> built either as modules or built-in.
>
> Side notes: it seems one is more likely to see this problem when the
> panel driver is built into the kernel. I've also seen this problem
> bisect down to commits that simply changed Kconfig dependencies, because
> it changed the order in which driver init functions were compiled into
> the kernel, and therefore the ordering and timing of built-in device
> probe.
>
> Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
> Link: https://lore.kernel.org/linux-rockchip/9aedfb528600ecf871885f7293ca4207c84d16c1.camel@gmail.com/
> Reported-by: <aleksandr.o.makarov@gmail.com>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume()
  2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
@ 2021-09-29  2:28   ` Chen-Yu Tsai
  2021-09-29 18:05   ` Nícolas F. R. A. Prado
  2021-10-17 21:55   ` Heiko Stuebner
  2 siblings, 0 replies; 12+ messages in thread
From: Chen-Yu Tsai @ 2021-09-29  2:28 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stübner, LKML, dri-devel,
	open list:ARM/Rockchip SoC...,
	Sandy Huang, Thomas Hebb, stable

On Wed, Sep 29, 2021 at 5:36 AM Brian Norris <briannorris@chromium.org> wrote:
>
> Since commit 43c2de1002d2, we perform most HW configuration in the
> bind() function. This configuration may be lost on suspend/resume, so we
> need to call it again. That may lead to errors like this after system
> suspend/resume:
>
>   dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
>   panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110
>
> Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).
>
> Note that early mailing list versions of this driver borrowed Rockchip's
> downstream/BSP solution, to do HW configuration in mode_set() (which
> *is* called at the appropriate pre-enable() times), but that was
> discarded along the way. I've avoided that still, because mode_set()
> documentation doesn't suggest this kind of purpose as far as I can tell.
>
> Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Brian Norris <briannorris@chromium.org>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume()
  2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
  2021-09-29  2:28   ` Chen-Yu Tsai
@ 2021-09-29 18:05   ` Nícolas F. R. A. Prado
  2021-10-17 21:55   ` Heiko Stuebner
  2 siblings, 0 replies; 12+ messages in thread
From: Nícolas F. R. A. Prado @ 2021-09-29 18:05 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stübner, linux-kernel, dri-devel, linux-rockchip,
	Sandy Huang, Chen-Yu Tsai, Thomas Hebb, stable

On Tue, Sep 28, 2021 at 02:35:50PM -0700, Brian Norris wrote:
> Since commit 43c2de1002d2, we perform most HW configuration in the
> bind() function. This configuration may be lost on suspend/resume, so we
> need to call it again. That may lead to errors like this after system
> suspend/resume:
> 
>   dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
>   panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110
> 
> Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).
> 
> Note that early mailing list versions of this driver borrowed Rockchip's
> downstream/BSP solution, to do HW configuration in mode_set() (which
> *is* called at the appropriate pre-enable() times), but that was
> discarded along the way. I've avoided that still, because mode_set()
> documentation doesn't suggest this kind of purpose as far as I can tell.
> 
> Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Brian Norris <briannorris@chromium.org>

Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error
  2021-09-28 21:35 ` [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error Brian Norris
@ 2021-09-29 18:09   ` Nícolas F. R. A. Prado
  0 siblings, 0 replies; 12+ messages in thread
From: Nícolas F. R. A. Prado @ 2021-09-29 18:09 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stübner, linux-kernel, dri-devel, linux-rockchip,
	Sandy Huang, Chen-Yu Tsai, Thomas Hebb

On Tue, Sep 28, 2021 at 02:35:51PM -0700, Brian Norris wrote:
> Our probe() function never enabled this clock, so we shouldn't disable
> it if we fail to probe the bridge.
> 
> Noted by inspection.
> 
> Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> ---

Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error
  2021-09-28 21:35 ` [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error Brian Norris
@ 2021-09-29 18:10   ` Nícolas F. R. A. Prado
  0 siblings, 0 replies; 12+ messages in thread
From: Nícolas F. R. A. Prado @ 2021-09-29 18:10 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stübner, linux-kernel, dri-devel, linux-rockchip,
	Sandy Huang, Chen-Yu Tsai, Thomas Hebb

On Tue, Sep 28, 2021 at 02:35:52PM -0700, Brian Norris wrote:
> Fix some error handling here noticed in review of other changes.
> 
> Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Reported-by: Chen-Yu Tsai <wenst@chromium.org>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts
  2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
                   ` (3 preceding siblings ...)
  2021-09-28 21:35 ` [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error Brian Norris
@ 2021-10-17 21:52 ` Heiko Stuebner
  4 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2021-10-17 21:52 UTC (permalink / raw)
  To: Brian Norris
  Cc: Heiko Stuebner, Thomas Hebb, aleksandr.o.makarov, linux-rockchip,
	Chen-Yu Tsai, Sandy Huang, dri-devel, linux-kernel

On Tue, 28 Sep 2021 14:35:48 -0700, Brian Norris wrote:
> The Rockchip DSI driver has had a number of bugs over time and has
> usually only worked by chance. A number of users have noticed that
> things regressed with commit 43c2de1002d2 ("drm/rockchip: dsi: move all
> lane config except LCDC mux to bind()"), although it was fixing several
> real issues of its own that had been present forever in the upstream
> driver (but notably, not in the downstream/BSP driver).
> 
> [...]

Applied, thanks!

[1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind
      commit: 514db871922f103886ad4d221cf406b4fcc5e74a
[2/4] drm/rockchip: dsi: Reconfigure hardware on resume()
      commit: e584cdc1549932f87a2707b56bc588cfac5d89e0
[3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error
      commit: 251888398753924059f3bb247a44153a2853137f
[4/4] drm/rockchip: dsi: Disable PLL clock on bind error
      commit: 5a614570172e1c9f59035d259dd735acd4f1c01b

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume()
  2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
  2021-09-29  2:28   ` Chen-Yu Tsai
  2021-09-29 18:05   ` Nícolas F. R. A. Prado
@ 2021-10-17 21:55   ` Heiko Stuebner
  2 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2021-10-17 21:55 UTC (permalink / raw)
  To: Brian Norris
  Cc: linux-kernel, dri-devel, linux-rockchip, Sandy Huang,
	Chen-Yu Tsai, Thomas Hebb, Brian Norris, stable

Am Dienstag, 28. September 2021, 23:35:50 CEST schrieb Brian Norris:
> Since commit 43c2de1002d2, we perform most HW configuration in the
> bind() function. This configuration may be lost on suspend/resume, so we
> need to call it again. That may lead to errors like this after system
> suspend/resume:
> 
>   dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO
>   panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110
> 
> Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet).
> 
> Note that early mailing list versions of this driver borrowed Rockchip's
> downstream/BSP solution, to do HW configuration in mode_set() (which
> *is* called at the appropriate pre-enable() times),

not always though. In non-atomic settings .mode_set actually doesn't
seem to be called every time. I've experienced this when drm disables
atomic when X11 is running.

So having real suspend/resume callbacks makes quite a lot of sense :-)


Heiko

> but that was
> discarded along the way. I've avoided that still, because mode_set()
> documentation doesn't suggest this kind of purpose as far as I can tell.
> 
> Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
> 
> Changes in v3:
>  - New patch, to fix related PM issue discovered after patch 1
> 
>  .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 37 +++++++++++++++++++
>  1 file changed, 37 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> index 45676b23c019..21c67343cc6c 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> @@ -268,6 +268,8 @@ struct dw_mipi_dsi_rockchip {
>  	struct dw_mipi_dsi *dmd;
>  	const struct rockchip_dw_dsi_chip_data *cdata;
>  	struct dw_mipi_dsi_plat_data pdata;
> +
> +	bool dsi_bound;
>  };
>  
>  struct dphy_pll_parameter_map {
> @@ -964,6 +966,8 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
>  		goto out_pm_runtime;
>  	}
>  
> +	dsi->dsi_bound = true;
> +
>  	return 0;
>  
>  out_pm_runtime:
> @@ -983,6 +987,8 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev,
>  	if (dsi->is_slave)
>  		return;
>  
> +	dsi->dsi_bound = false;
> +
>  	dw_mipi_dsi_unbind(dsi->dmd);
>  
>  	clk_disable_unprepare(dsi->pllref_clk);
> @@ -1277,6 +1283,36 @@ static const struct phy_ops dw_mipi_dsi_dphy_ops = {
>  	.exit		= dw_mipi_dsi_dphy_exit,
>  };
>  
> +static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev)
> +{
> +	struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev);
> +	int ret;
> +
> +	/*
> +	 * Re-configure DSI state, if we were previously initialized. We need
> +	 * to do this before rockchip_drm_drv tries to re-enable() any panels.
> +	 */
> +	if (dsi->dsi_bound) {
> +		ret = clk_prepare_enable(dsi->grf_clk);
> +		if (ret) {
> +			DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
> +			return ret;
> +		}
> +
> +		dw_mipi_dsi_rockchip_config(dsi);
> +		if (dsi->slave)
> +			dw_mipi_dsi_rockchip_config(dsi->slave);
> +
> +		clk_disable_unprepare(dsi->grf_clk);
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = {
> +	SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume)
> +};
> +
>  static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
>  {
>  	struct device *dev = &pdev->dev;
> @@ -1594,6 +1630,7 @@ struct platform_driver dw_mipi_dsi_rockchip_driver = {
>  	.remove		= dw_mipi_dsi_rockchip_remove,
>  	.driver		= {
>  		.of_match_table = dw_mipi_dsi_rockchip_dt_ids,
> +		.pm	= &dw_mipi_dsi_rockchip_pm_ops,
>  		.name	= "dw-mipi-dsi-rockchip",
>  	},
>  };
> 





^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2021-10-17 21:55 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-28 21:35 [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Brian Norris
2021-09-28 21:35 ` [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind Brian Norris
2021-09-29  2:27   ` Chen-Yu Tsai
2021-09-28 21:35 ` [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() Brian Norris
2021-09-29  2:28   ` Chen-Yu Tsai
2021-09-29 18:05   ` Nícolas F. R. A. Prado
2021-10-17 21:55   ` Heiko Stuebner
2021-09-28 21:35 ` [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error Brian Norris
2021-09-29 18:09   ` Nícolas F. R. A. Prado
2021-09-28 21:35 ` [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error Brian Norris
2021-09-29 18:10   ` Nícolas F. R. A. Prado
2021-10-17 21:52 ` [PATCH v3 0/4] Fix Rockchip MIPI DSI display init timeouts Heiko Stuebner

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