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From: Yang Weijiang <weijiang.yang@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Yang Weijiang <weijiang.yang@intel.com>,
	pbonzini@redhat.com, jmattson@google.com,
	like.xu.linux@gmail.com, vkuznets@redhat.com,
	wei.w.wang@intel.com, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 15/15] KVM: x86/cpuid: Advise Arch LBR feature in CPUID
Date: Fri, 15 Oct 2021 09:28:21 +0800	[thread overview]
Message-ID: <20211015012821.GA29942@intel.com> (raw)
In-Reply-To: <YWjE0iQ6fDdJpDfT@google.com>

On Fri, Oct 15, 2021 at 12:01:22AM +0000, Sean Christopherson wrote:
> s/Advise/Advertise
> 
> On Tue, Aug 24, 2021, Yang Weijiang wrote:
> > Add Arch LBR feature bit in CPU cap-mask to expose the feature.
> > Only max LBR depth is supported for guest, and it's consistent
> > with host Arch LBR settings.
> > 
> > Co-developed-by: Like Xu <like.xu@linux.intel.com>
> > Signed-off-by: Like Xu <like.xu@linux.intel.com>
> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> > ---
> >  arch/x86/kvm/cpuid.c | 33 ++++++++++++++++++++++++++++++++-
> >  1 file changed, 32 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 03025eea1524..d98ebefd5d72 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -88,6 +88,16 @@ static int kvm_check_cpuid(struct kvm_cpuid_entry2 *entries, int nent)
> >  		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
> >  			return -EINVAL;
> >  	}
> > +	best = cpuid_entry2_find(entries, nent, 0x1c, 0);
> > +	if (best) {
> > +		unsigned int eax, ebx, ecx, edx;
> > +
> > +		/* Reject user-space CPUID if depth is different from host's.*/
> 
> Why disallow this?  I don't see why it would be illegal for userspace to specify
> fewer LBRs, and KVM should darn well verify that any MSRs it's exposing to the
> guest actually exist.
Hi, Sean,
Thanks for the comments!
The treatment for LBR depth is a bit special, only the host value can be
supported now, i.e., 32. If userspace set the value other that 32, would like
to notify it as early as possible.
Do you want to remove the check here and correct the invalid setting silently when
guest is querying CPUID?

> 
> > +		cpuid_count(0x1c, 0, &eax, &ebx, &ecx, &edx);
> > +
> > +		if ((best->eax & 0xff) != BIT(fls(eax & 0xff) - 1))
> > +			return -EINVAL;
> > +	}
> >  
> >  	return 0;
> >  }

  reply	other threads:[~2021-10-15  1:14 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-24  7:56 [PATCH v8 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 01/15] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 02/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 03/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 04/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2021-08-25  7:59   ` kernel test robot
2021-08-27  1:06   ` kernel test robot
2021-08-24  7:56 ` [PATCH v8 06/15] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 07/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 08/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 10/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 11/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 12/15] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 13/15] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 14/15] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2021-08-24  7:56 ` [PATCH v8 15/15] KVM: x86/cpuid: Advise Arch LBR feature in CPUID Yang Weijiang
2021-10-15  0:01   ` Sean Christopherson
2021-10-15  1:28     ` Yang Weijiang [this message]
2021-10-15  2:05       ` Like Xu
2021-10-15 14:49         ` Sean Christopherson
2021-09-07  3:26 ` [PATCH v8 00/15] Introduce Architectural LBR for vPMU Yang Weijiang

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