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From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <ludovic.desroches@microchip.com>, <vkoul@kernel.org>,
<richard.genoud@gmail.com>, <gregkh@linuxfoundation.org>,
<jirislaby@kernel.org>
Cc: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<mripard@kernel.org>, <linux-arm-kernel@lists.infradead.org>,
<dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-serial@vger.kernel.org>,
Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: [PATCH v2 11/13] dmaengine: at_xdmac: Fix lld view setting
Date: Thu, 25 Nov 2021 11:00:26 +0200 [thread overview]
Message-ID: <20211125090028.786832-12-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20211125090028.786832-1-tudor.ambarus@microchip.com>
AT_XDMAC_CNDC_NDVIEW_NDV3 was set even for AT_XDMAC_MBR_UBC_NDV2,
because of the wrong bit handling. Fix it.
Fixes: ee0fe35c8dcd ("dmaengine: xdmac: Handle descriptor's view 3 registers")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/dma/at_xdmac.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 89d0fc229d68..ba2fe383fa5e 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -99,6 +99,7 @@
#define AT_XDMAC_CNDC_NDE (0x1 << 0) /* Channel x Next Descriptor Enable */
#define AT_XDMAC_CNDC_NDSUP (0x1 << 1) /* Channel x Next Descriptor Source Update */
#define AT_XDMAC_CNDC_NDDUP (0x1 << 2) /* Channel x Next Descriptor Destination Update */
+#define AT_XDMAC_CNDC_NDVIEW_MASK GENMASK(28, 27)
#define AT_XDMAC_CNDC_NDVIEW_NDV0 (0x0 << 3) /* Channel x Next Descriptor View 0 */
#define AT_XDMAC_CNDC_NDVIEW_NDV1 (0x1 << 3) /* Channel x Next Descriptor View 1 */
#define AT_XDMAC_CNDC_NDVIEW_NDV2 (0x2 << 3) /* Channel x Next Descriptor View 2 */
@@ -402,7 +403,8 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *atchan,
*/
if (at_xdmac_chan_is_cyclic(atchan))
reg = AT_XDMAC_CNDC_NDVIEW_NDV1;
- else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)
+ else if ((first->lld.mbr_ubc &
+ AT_XDMAC_CNDC_NDVIEW_MASK) == AT_XDMAC_MBR_UBC_NDV3)
reg = AT_XDMAC_CNDC_NDVIEW_NDV3;
else
reg = AT_XDMAC_CNDC_NDVIEW_NDV2;
--
2.25.1
next prev parent reply other threads:[~2021-11-25 9:03 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-25 9:00 [PATCH v2 00/13] dmaengine: at_xdmac: Various fixes Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 01/13] dmaengine: at_xdmac: Don't start transactions at tx_submit level Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 02/13] tty: serial: atmel: Check return code of dmaengine_submit() Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 03/13] tty: serial: atmel: Call dma_async_issue_pending() Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 04/13] dmaengine: at_xdmac: Start transfer for cyclic channels in issue_pending Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 05/13] dmaengine: at_xdmac: Print debug message after realeasing the lock Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 06/13] dmaengine: at_xdmac: Fix concurrency over chan's completed_cookie Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 07/13] dmaengine: at_xdmac: Fix race for the tx desc callback Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 08/13] dmaengine: at_xdmac: Move the free desc to the tail of the desc list Tudor Ambarus
2021-12-13 8:07 ` Vinod Koul
2021-12-13 8:51 ` Tudor.Ambarus
2021-12-13 8:59 ` Vinod Koul
2021-12-13 9:00 ` Vinod Koul
2021-12-13 9:22 ` Tudor.Ambarus
2021-12-13 9:27 ` Tudor.Ambarus
2021-11-25 9:00 ` [PATCH v2 09/13] dmaengine: at_xdmac: Fix concurrency over xfers_list Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 10/13] dmaengine: at_xdmac: Remove a level of indentation in at_xdmac_advance_work() Tudor Ambarus
2021-11-25 9:00 ` Tudor Ambarus [this message]
2021-11-25 9:00 ` [PATCH v2 12/13] dmaengine: at_xdmac: Fix at_xdmac_lld struct definition Tudor Ambarus
2021-11-25 9:00 ` [PATCH v2 13/13] dmaengine: at_xdmac: Fix race over irq_status Tudor Ambarus
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