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From: Stephen Boyd <sboyd@kernel.org>
To: "Limonciello, Mario" <mario.limonciello@amd.com>,
	Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>,
	linux-clk@vger.kernel.org, rafael@kernel.org
Cc: Vijendar.Mukunda@amd.com, Alexander.Deucher@amd.com,
	Basavaraj.Hiregoudar@amd.com, Sunil-kumar.Dommati@amd.com,
	Michael Turquette <mturquette@baylibre.com>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 1/7] x86: clk: clk-fch: Add support for newer family of AMD's SOC
Date: Thu, 09 Dec 2021 17:45:46 -0800	[thread overview]
Message-ID: <20211210014547.CAE24C004DD@smtp.kernel.org> (raw)
In-Reply-To: <a7b9fbfc-c7e6-983e-1f79-189ce6dc983a@amd.com>

Quoting Limonciello, Mario (2021-11-30 11:41:30)
> On 11/25/2021 05:04, Ajit Kumar Pandey wrote:
> > @@ -26,22 +27,37 @@
> >   #define ST_CLK_GATE 3
> >   #define ST_MAX_CLKS 4
> >   
> > -#define RV_CLK_48M   0
> > -#define RV_CLK_GATE  1
> > -#define RV_MAX_CLKS  2
> > +#define CLK_48M_FIXED        0
> > +#define CLK_GATE_FIXED       1
> > +#define CLK_MAX_FIXED        2
> > +
> > +/* List of supported CPU ids for fixed clk */
> > +#define AMD_CPU_ID_RV                        0x15D0
> >   
> >   static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
> >   static struct clk_hw *hws[ST_MAX_CLKS];
> >   
> > +static const struct pci_device_id soc_pci_ids[] = {
> > +     { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RV) },
> > +     { }
> > +};
> > +
> 
> Have you considered inverting it?  The number of ASICs using the "older" 
> design with the mux and multiple clock sources is a fixed value, but 
> we'll keep adding new ASICs in the "new" design of just 48Mhz.
> 
> Notably; I see that this series is missing the Yellow Carp ID for 
> example.  We'll keep having more designs with the 48Mhz that need to be 
> added to this list.

+1 Let's not keep adding to a list.

  reply	other threads:[~2021-12-10  1:45 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20211125110447.1188073-1-AjitKumar.Pandey@amd.com>
2021-11-25 11:04 ` Ajit Kumar Pandey
2021-11-30 19:41   ` Limonciello, Mario
2021-12-10  1:45     ` Stephen Boyd [this message]
2021-11-25 11:04 ` [PATCH v4 2/7] drivers: acpi: acpi_apd: Remove unused device property "is-rv" Ajit Kumar Pandey
2021-11-25 11:04 ` [PATCH v4 3/7] ACPI: APD: Add a fmw property clk-name Ajit Kumar Pandey
2021-11-25 11:04 ` [PATCH v4 4/7] clk: x86: Use dynamic con_id string during clk registration Ajit Kumar Pandey
2021-11-25 11:04 ` [PATCH v4 5/7] clk: x86: Fix clk_gate_flags for RV_CLK_GATE Ajit Kumar Pandey
2021-11-25 11:04 ` [PATCH v4 6/7] drivers: x86: clk-fch: Add 48MHz fixed clk support on Renoir platform Ajit Kumar Pandey
2021-11-25 11:04 ` [PATCH v4 7/7] drivers: x86: clk-fch: Add 48MHz fixed clk support on Stoneyridge Ajit Kumar Pandey

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