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From: "Leonardo Brás" <leobras.c@gmail.com>
To: Alexey Kardashevskiy <aik@ozlabs.ru>,
	Frederic Barrat <fbarrat@linux.ibm.com>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	David Gibson <david@gibson.dropbear.id.au>,
	kernel test robot <lkp@intel.com>,
	Nicolin Chen <nicoleotsuka@gmail.com>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 10/11] powerpc/pseries/iommu: Make use of DDW for indirect mapping
Date: Tue, 17 Aug 2021 02:59:55 -0300	[thread overview]
Message-ID: <25299f8dc62953996a43c3d654937d51ea8b1d9c.camel@gmail.com> (raw)
In-Reply-To: <75c84c0b-46b3-2600-c186-257aec05c645@ozlabs.ru>

Alexey, Fred:

On Fri, 2021-07-23 at 15:34 +1000, Alexey Kardashevskiy wrote:
> 
> 
> On 22/07/2021 01:04, Frederic Barrat wrote:
> > 
> > 
> > On 21/07/2021 05:32, Alexey Kardashevskiy wrote:
> > > > > +        struct iommu_table *newtbl;
> > > > > +        int i;
> > > > > +
> > > > > +        for (i = 0; i < ARRAY_SIZE(pci->phb->mem_resources);
> > > > > i++) {
> > > > > +            const unsigned long mask = IORESOURCE_MEM_64 | 
> > > > > IORESOURCE_MEM;
> > > > > +
> > > > > +            /* Look for MMIO32 */
> > > > > +            if ((pci->phb->mem_resources[i].flags & mask) ==
> > > > > IORESOURCE_MEM)
> > > > > +                break;
> > > > > +        }
> > > > > +
> > > > > +        if (i == ARRAY_SIZE(pci->phb->mem_resources))
> > > > > +            goto out_del_list;
> > > > 
> > > > 
> > > > So we exit and do nothing if there's no MMIO32 bar?
> > > > Isn't the intent just to figure out the MMIO32 area to reserve
> > > > it 
> > > > when init'ing the table? In which case we could default to 0,0
> > > > 
> > > > I'm actually not clear why we are reserving this area on
> > > > pseries.
> > > 
> > > 
> > > 
> > > If we do not reserve it, then the iommu code will allocate DMA
> > > pages 
> > > from there and these addresses are MMIO32 from the kernel pov at 
> > > least. I saw crashes when (I think) a device tried DMAing to the
> > > top 
> > > 2GB of the bus space which happened to be a some other device's
> > > BAR.
> > 
> > 
> > hmmm... then figuring out the correct range needs more work. We
> > could 
> > have more than one MMIO32 bar. And they don't have to be adjacent. 
> 
> They all have to be within the MMIO32 window of a PHB and we reserve
> the 
> entire window here.
> 
> > I 
> > don't see that we are reserving any range on the initial table
> > though 
> > (on pseries).
> True, we did not need to, as the hypervisor always took care of DMA
> and 
> MMIO32 regions to not overlap.
> 
> And in this series we do not (strictly speaking) need this either as 
> phyp never allocates more than one window dynamically and that only 
> window is always the second one starting from 0x800.0000.0000.0000.
> It 
> is probably my mistake that KVM allows a new window to start from 0 -
> PAPR did not prohibit this explicitly.
> 
> And for the KVM case, we do not need to remove the default window as
> KVM 
> can pretty much always allocate as many TCE as the VM wants. But we 
> still allow removing the default window and creating a huge one
> instead 
> at 0x0 as this way we can allow 1:1 for every single PCI device even
> if 
> it only allows 48 (or similar but less than 64bit) DMA. Hope this
> makes 
> sense. Thanks,
> 
> 

Thank you for this discussion, I got to learn a lot!

If I got this, no further change will be necessary, is that correct?

I am testing a v6, and I intend to send it soon.


  reply	other threads:[~2021-08-17  5:59 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-16  8:27 [PATCH v5 00/11] DDW + Indirect Mapping Leonardo Bras
2021-07-16  8:27 ` [PATCH v5 01/11] powerpc/pseries/iommu: Replace hard-coded page shift Leonardo Bras
2021-07-19 13:48   ` Frederic Barrat
2021-07-19 18:43     ` Leonardo Brás
2021-07-16  8:27 ` [PATCH v5 02/11] powerpc/kernel/iommu: Add new iommu_table_in_use() helper Leonardo Bras
2021-07-19 13:53   ` Frederic Barrat
2021-07-20  5:38     ` Leonardo Brás
2021-07-20  9:41       ` Alexey Kardashevskiy
2021-07-16  8:27 ` [PATCH v5 03/11] powerpc/pseries/iommu: Add iommu_pseries_alloc_table() helper Leonardo Bras
2021-07-19 14:04   ` Frederic Barrat
2021-07-19 18:47     ` Leonardo Brás
2021-07-16  8:27 ` [PATCH v5 04/11] powerpc/pseries/iommu: Add ddw_list_new_entry() helper Leonardo Bras
2021-07-19 14:14   ` Frederic Barrat
2021-07-19 18:47     ` Leonardo Brás
2021-07-16  8:27 ` [PATCH v5 05/11] powerpc/pseries/iommu: Allow DDW windows starting at 0x00 Leonardo Bras
2021-07-20 17:44   ` Frederic Barrat
2021-07-16  8:27 ` [PATCH v5 06/11] powerpc/pseries/iommu: Add ddw_property_create() and refactor enable_ddw() Leonardo Bras
2021-07-20 17:49   ` Frederic Barrat
2021-08-17  5:59     ` Leonardo Brás
2021-07-16  8:27 ` [PATCH v5 07/11] powerpc/pseries/iommu: Reorganize iommu_table_setparms*() with new helper Leonardo Bras
2021-07-20 17:50   ` Frederic Barrat
2021-07-16  8:27 ` [PATCH v5 08/11] powerpc/pseries/iommu: Update remove_dma_window() to accept property name Leonardo Bras
2021-07-20 17:51   ` Frederic Barrat
2021-08-17  5:59     ` Leonardo Brás
2021-08-17  6:12       ` Leonardo Brás
2021-08-24  6:31         ` Alexey Kardashevskiy
2021-07-16  8:27 ` [PATCH v5 09/11] powerpc/pseries/iommu: Find existing DDW with given " Leonardo Bras
2021-07-20 17:52   ` Frederic Barrat
2021-07-16  8:27 ` [PATCH v5 10/11] powerpc/pseries/iommu: Make use of DDW for indirect mapping Leonardo Bras
2021-07-20 18:12   ` Frederic Barrat
2021-07-21  3:32     ` Alexey Kardashevskiy
2021-07-21 15:04       ` Frederic Barrat
2021-07-23  5:34         ` Alexey Kardashevskiy
2021-08-17  5:59           ` Leonardo Brás [this message]
2021-08-17  5:59       ` Leonardo Brás
2021-07-16  8:27 ` [PATCH v5 11/11] powerpc/pseries/iommu: Rename "direct window" to "dma window" Leonardo Bras
2021-07-20 18:12   ` Frederic Barrat

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