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From: valmiki <valmikibow@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	tglx@linutronix.de, jason@lakedaemon.net,
	Catalin Marinas <catalin.marinas@arm.com>
Subject: Affinity for GIC irq line
Date: Wed, 25 Apr 2018 08:53:09 +0530	[thread overview]
Message-ID: <2880aee6-704c-a5aa-e193-75bba1bce43d@gmail.com> (raw)

Hi all,

When an IRQ line is set affinity using irq_set_affinity, which calls 
irq_do_set_affinity, this API copies affinity mask to affinity variable 
in irq_common_data of this irq descriptor.

But as per ARM GICv2 document in order to drive a interrupt to a 
specific CPU we need to program GICD_ITARGETSRn register.

But irq_set_affinity isn't writing to this register.Please correct me if 
I'm wrong i did not find code for this register being updated in 
irq_set_affinity flow.
So how affinity is being set for an IRQ line ?

If affinity was set successfully on what CPU does asm_do_IRQ run ?
For every interrupt this runs on CPU0 and then FIQ/IRQ handling is 
scheduled on different CPU as per affinity ?
How the respective irq line handler is handled on specific CPU core ?

Regards,
Valmiki


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             reply	other threads:[~2018-04-25  3:23 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-25  3:23 valmiki [this message]
2018-04-25  7:07 ` Marc Zyngier
2018-04-26  3:49   ` valmiki

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