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* [PATCH v2 0/3] phy: stm32: add phy tuning support
@ 2021-10-05 15:24 Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay
                   ` (2 more replies)
  0 siblings, 3 replies; 11+ messages in thread
From: Amelie Delaunay @ 2021-10-05 15:24 UTC (permalink / raw)
  To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring,
	Alexandre Torgue, Maxime Coquelin
  Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel,
	linux-stm32, Amelie Delaunay

This series brings phy tuning to stm32-usbphyc with new optional
device tree properties.
A prior patch add resume routine, which is used to restore UTMI
switch and phy tuning configuration, as they can be reset if
deep low power state is achieved.

Amelie Delaunay (3):
  phy: stm32: restore utmi switch on resume
  dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning
    properties
  phy: stm32: add phy tuning support

---
Changes in v2:
- st,phy-tuning + usb_phy_tuning node removed
- properties are now in phy child nodes

 .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 +++++++++++
 drivers/phy/st/phy-stm32-usbphyc.c            | 204 ++++++++++++++++++
 2 files changed, 330 insertions(+)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v2 1/3] phy: stm32: restore utmi switch on resume
  2021-10-05 15:24 [PATCH v2 0/3] phy: stm32: add phy tuning support Amelie Delaunay
@ 2021-10-05 15:24 ` Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 3/3] phy: stm32: add phy tuning support Amelie Delaunay
  2 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2021-10-05 15:24 UTC (permalink / raw)
  To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring,
	Alexandre Torgue, Maxime Coquelin
  Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel,
	linux-stm32, Amelie Delaunay

UTMI switch value can be lost during suspend/resume, depending on the power
state reached.
This patch adds resume function to usbphyc, to reconfigure utmi switch
after suspend.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
 drivers/phy/st/phy-stm32-usbphyc.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c
index 937a14fa7448..083593aea53a 100644
--- a/drivers/phy/st/phy-stm32-usbphyc.c
+++ b/drivers/phy/st/phy-stm32-usbphyc.c
@@ -598,6 +598,18 @@ static int stm32_usbphyc_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static int __maybe_unused stm32_usbphyc_resume(struct device *dev)
+{
+	struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev);
+
+	if (usbphyc->switch_setup >= 0)
+		stm32_usbphyc_switch_setup(usbphyc, usbphyc->switch_setup);
+
+	return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(stm32_usbphyc_pm_ops, NULL, stm32_usbphyc_resume);
+
 static const struct of_device_id stm32_usbphyc_of_match[] = {
 	{ .compatible = "st,stm32mp1-usbphyc", },
 	{ },
@@ -610,6 +622,7 @@ static struct platform_driver stm32_usbphyc_driver = {
 	.driver = {
 		.of_match_table = stm32_usbphyc_of_match,
 		.name = "stm32-usbphyc",
+		.pm = &stm32_usbphyc_pm_ops,
 	}
 };
 module_platform_driver(stm32_usbphyc_driver);
-- 
2.25.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-05 15:24 [PATCH v2 0/3] phy: stm32: add phy tuning support Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay
@ 2021-10-05 15:24 ` Amelie Delaunay
  2021-10-05 22:45   ` Rob Herring
  2021-10-14 17:26   ` Rob Herring
  2021-10-05 15:24 ` [PATCH v2 3/3] phy: stm32: add phy tuning support Amelie Delaunay
  2 siblings, 2 replies; 11+ messages in thread
From: Amelie Delaunay @ 2021-10-05 15:24 UTC (permalink / raw)
  To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring,
	Alexandre Torgue, Maxime Coquelin
  Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel,
	linux-stm32, Amelie Delaunay

This patch adds the description of new optional phy tuning properties
for usbphyc phy sub nodes.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
Changes in v2:
- st,phy-tuning property removed
- tuning properties are now put directly in each child node
- tuning properties are no more free form text and their name reworked
---
 .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 ++++++++++++++++++
 1 file changed, 126 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
index 3329f1d33a4f..c0f4dff2b8cb 100644
--- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
@@ -81,6 +81,116 @@ patternProperties:
         properties:
           vbus-supply: true
 
+      # It can be necessary to adjust the PHY settings to compensate parasitics, which can be due
+      # to USB connector/receptacle, routing, ESD protection component,... Here is the list of
+      # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
+      # Speed, LS for Low-Speed)
+
+      st,current-boost-milliamp:
+        description: Current boosting in mA
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 1
+        maximum: 2
+
+      st,no-lsfs-fb-cap:
+        description: Disables the LS/FS feedback capacitor
+        type: boolean
+
+      st,decrease-hs-slew-rate:
+        description: Decreases the HS driver slew rate by 10%
+        type: boolean
+
+      st,tune-hs-dc-level:
+        description: Tunes the HS driver DC level
+          - <0> normal level
+          - <1> increases the level by 5 to 7 mV
+          - <2> increases the level by 10 to 14 mV
+          - <3> decreases the level by 5 to 7 mV
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 3
+        default: 0
+
+      st,enable-fs-rftime-tuning:
+        description: Enables the FS rise/fall tuning option
+        type: boolean
+
+      st,enable-hs-rftime-reduction:
+        description: Enables the HS rise/fall reduction feature
+        type: boolean
+
+      st,trim-hs-current:
+        description: Controls HS driver current trimming for choke compensation
+          - <0> = 18.87 mA target current / nominal + 0%
+          - <1> = 19.165 mA target current / nominal + 1.56%
+          - <2> = 19.46 mA target current / nominal + 3.12%
+          - <3> = 19.755 mA target current / nominal + 4.68%
+          - <4> = 20.05 mA target current / nominal + 6.24%
+          - <5> = 20.345 mA target current / nominal + 7.8%
+          - <6> = 20.64 mA target current / nominal + 9.36%
+          - <7> = 20.935 mA target current / nominal + 10.92%
+          - <8> = 21.23 mA target current / nominal + 12.48%
+          - <9> = 21.525 mA target current / nominal + 14.04%
+          - <10> = 21.82 mA target current / nominal + 15.6%
+          - <11> = 22.115 mA target current / nominal + 17.16%
+          - <12> = 22.458 mA target current / nominal + 19.01%
+          - <13> = 22.755 mA target current / nominal + 20.58%
+          - <14> = 23.052 mA target current / nominal + 22.16%
+          - <15> = 23.348 mA target current / nominal + 23.73%
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 15
+        default: 0
+
+      st,trim-hs-impedance:
+        description: Controls HS driver impedance tuning for choke compensation
+          - <0> = no impedance offset
+          - <1> = reduce the impedance by 2 ohms
+          - <2> = reduce the impedance by 4 ohms
+          - <3> = reduce the impedance by 6 ohms
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 3
+        default: 0
+
+      st,tune-squelch-level:
+        description: Tunes the squelch DC threshold value
+          - <0> = no shift in threshold
+          - <1> = threshold shift by +7 mV
+          - <2> = threshold shift by -5 mV
+          - <3> = threshold shift by +14 mV
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 3
+        default: 0
+
+      st,enable-hs-rx-gain-eq:
+        description: Enables the HS Rx gain equalizer
+        type: boolean
+
+      st,tune-hs-rx-offset:
+        description: Adjusts the HS Rx offset
+          - <0> = no offset
+          - <1> = offset of +5 mV
+          - <2> = offset of +10 mV
+          - <3> = offset of -5 mV
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 3
+        default: 0
+
+      st,no-hs-ftime-ctrl:
+        description: Disables the HS fall time control of single ended signals during pre-emphasis
+        type: boolean
+
+      st,no-lsfs-sc:
+        description: Disables the short circuit protection in LS/FS driver
+        type: boolean
+
+      st,enable-hs-tx-staggering:
+        description: Enables the basic staggering in HS Tx mode
+        type: boolean
+
     allOf:
       - if:
           properties:
@@ -137,6 +247,14 @@ examples:
             reg = <0>;
             phy-supply = <&vdd_usb>;
             #phy-cells = <0>;
+            st,tune-hs-dc-level = <2>;
+            st,enable-fs-rftime-tuning;
+            st,enable-hs-rftime-reduction;
+            st,trim-hs-current = <15>;
+            st,trim-hs-impedance = <1>;
+            st,tune-squelch-level = <3>;
+            st,tune-hs-rx-offset = <2>;
+            st,no-lsfs-sc;
             connector {
                 compatible = "usb-a-connector";
                 vbus-supply = <&vbus_sw>;
@@ -147,6 +265,14 @@ examples:
             reg = <1>;
             phy-supply = <&vdd_usb>;
             #phy-cells = <1>;
+            st,tune-hs-dc-level = <2>;
+            st,enable-fs-rftime-tuning;
+            st,enable-hs-rftime-reduction;
+            st,trim-hs-current = <15>;
+            st,trim-hs-impedance = <1>;
+            st,tune-squelch-level = <3>;
+            st,tune-hs-rx-offset = <2>;
+            st,no-lsfs-sc;
         };
     };
 ...
-- 
2.25.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v2 3/3] phy: stm32: add phy tuning support
  2021-10-05 15:24 [PATCH v2 0/3] phy: stm32: add phy tuning support Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay
  2021-10-05 15:24 ` [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties Amelie Delaunay
@ 2021-10-05 15:24 ` Amelie Delaunay
  2 siblings, 0 replies; 11+ messages in thread
From: Amelie Delaunay @ 2021-10-05 15:24 UTC (permalink / raw)
  To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring,
	Alexandre Torgue, Maxime Coquelin
  Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel,
	linux-stm32, Amelie Delaunay

It can be necessary to adjust the phys settings to compensate parasitics.
This patch adds support of new optional properties to configure the tune
interface of the phys of stm32-usbphyc.
Properties are optional, that's why each property is skipped if not
found (-EINVAL).
Phy tuning is restored on resume because if deep low power state is
achieved, phy tuning configuration is reset.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
 drivers/phy/st/phy-stm32-usbphyc.c | 191 +++++++++++++++++++++++++++++
 1 file changed, 191 insertions(+)

diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c
index 083593aea53a..238c4c8d4a15 100644
--- a/drivers/phy/st/phy-stm32-usbphyc.c
+++ b/drivers/phy/st/phy-stm32-usbphyc.c
@@ -20,6 +20,7 @@
 #define STM32_USBPHYC_PLL	0x0
 #define STM32_USBPHYC_MISC	0x8
 #define STM32_USBPHYC_MONITOR(X) (0x108 + ((X) * 0x100))
+#define STM32_USBPHYC_TUNE(X)	(0x10C + ((X) * 0x100))
 #define STM32_USBPHYC_VERSION	0x3F4
 
 /* STM32_USBPHYC_PLL bit fields */
@@ -41,6 +42,84 @@
 #define STM32_USBPHYC_MON_SEL_LOCKP 0x1F
 #define STM32_USBPHYC_MON_OUT_LOCKP BIT(3)
 
+/* STM32_USBPHYC_TUNE bit fields */
+#define INCURREN		BIT(0)
+#define INCURRINT		BIT(1)
+#define LFSCAPEN		BIT(2)
+#define HSDRVSLEW		BIT(3)
+#define HSDRVDCCUR		BIT(4)
+#define HSDRVDCLEV		BIT(5)
+#define HSDRVCURINCR		BIT(6)
+#define FSDRVRFADJ		BIT(7)
+#define HSDRVRFRED		BIT(8)
+#define HSDRVCHKITRM		GENMASK(12, 9)
+#define HSDRVCHKZTRM		GENMASK(14, 13)
+#define OTPCOMP			GENMASK(19, 15)
+#define SQLCHCTL		GENMASK(21, 20)
+#define HDRXGNEQEN		BIT(22)
+#define HSRXOFF			GENMASK(24, 23)
+#define HSFALLPREEM		BIT(25)
+#define SHTCCTCTLPROT		BIT(26)
+#define STAGSEL			BIT(27)
+
+enum boosting_vals {
+	BOOST_1_MA = 1,
+	BOOST_2_MA,
+	BOOST_MAX,
+};
+
+enum dc_level_vals {
+	DC_NOMINAL,
+	DC_PLUS_5_TO_7_MV,
+	DC_PLUS_10_TO_14_MV,
+	DC_MINUS_5_TO_7_MV,
+	DC_MAX,
+};
+
+enum current_trim {
+	CUR_NOMINAL,
+	CUR_PLUS_1_56_PCT,
+	CUR_PLUS_3_12_PCT,
+	CUR_PLUS_4_68_PCT,
+	CUR_PLUS_6_24_PCT,
+	CUR_PLUS_7_8_PCT,
+	CUR_PLUS_9_36_PCT,
+	CUR_PLUS_10_92_PCT,
+	CUR_PLUS_12_48_PCT,
+	CUR_PLUS_14_04_PCT,
+	CUR_PLUS_15_6_PCT,
+	CUR_PLUS_17_16_PCT,
+	CUR_PLUS_19_01_PCT,
+	CUR_PLUS_20_58_PCT,
+	CUR_PLUS_22_16_PCT,
+	CUR_PLUS_23_73_PCT,
+	CUR_MAX,
+};
+
+enum impedance_trim {
+	IMP_NOMINAL,
+	IMP_MINUS_2_OHMS,
+	IMP_MINUS_4_OMHS,
+	IMP_MINUS_6_OHMS,
+	IMP_MAX,
+};
+
+enum squelch_level {
+	SQLCH_NOMINAL,
+	SQLCH_PLUS_7_MV,
+	SQLCH_MINUS_5_MV,
+	SQLCH_PLUS_14_MV,
+	SQLCH_MAX,
+};
+
+enum rx_offset {
+	NO_RX_OFFSET,
+	RX_OFFSET_PLUS_5_MV,
+	RX_OFFSET_PLUS_10_MV,
+	RX_OFFSET_MINUS_5_MV,
+	RX_OFFSET_MAX,
+};
+
 /* STM32_USBPHYC_VERSION bit fields */
 #define MINREV			GENMASK(3, 0)
 #define MAJREV			GENMASK(7, 4)
@@ -60,6 +139,7 @@ struct stm32_usbphyc_phy {
 	struct regulator *vbus;
 	u32 index;
 	bool active;
+	u32 tune;
 };
 
 struct stm32_usbphyc {
@@ -375,6 +455,107 @@ static int stm32_usbphyc_clk48_register(struct stm32_usbphyc *usbphyc)
 	return ret;
 }
 
+static void stm32_usbphyc_phy_tuning(struct stm32_usbphyc *usbphyc,
+				     struct device_node *np, u32 index)
+{
+	struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys[index];
+	u32 reg = STM32_USBPHYC_TUNE(index);
+	u32 otpcomp, val;
+	int ret;
+
+	/* Backup OTP compensation code */
+	otpcomp = FIELD_GET(OTPCOMP, readl_relaxed(usbphyc->base + reg));
+
+	ret = of_property_read_u32(np, "st,current-boost-microamp", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < BOOST_MAX) {
+			val = (val == BOOST_2_MA) ? 1 : 0;
+			usbphyc_phy->tune |= INCURREN | FIELD_PREP(INCURRINT, val);
+		} else {
+			dev_warn(usbphyc->dev, "phy%d: invalid st,current-boost-microamp\n", index);
+		}
+	}
+
+	if (!of_property_read_bool(np, "st,no-lsfs-fb-cap"))
+		usbphyc_phy->tune |= LFSCAPEN;
+
+	if (of_property_read_bool(np, "st,slow-hs-slew-rate"))
+		usbphyc_phy->tune |= HSDRVSLEW;
+
+	ret = of_property_read_u32(np, "st,tune-hs-dc-level", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < DC_MAX) {
+			if (val == DC_MINUS_5_TO_7_MV) {/* Decreases HS driver DC level */
+				usbphyc_phy->tune |= HSDRVDCCUR;
+			} else if (val > 0) {		/* Increases HS driver DC level */
+				val = (val == DC_PLUS_10_TO_14_MV) ? 1 : 0;
+				usbphyc_phy->tune |= HSDRVCURINCR | FIELD_PREP(HSDRVDCLEV, val);
+			}
+		} else {
+			dev_warn(usbphyc->dev, "phy%d: invalid st,tune-hs-dc-level\n", index);
+		}
+	}
+
+	if (of_property_read_bool(np, "st,enable-fs-rftime-tuning"))
+		usbphyc_phy->tune |= FSDRVRFADJ;
+
+	if (of_property_read_bool(np, "st,enable-hs-rftime-reduction"))
+		usbphyc_phy->tune |= HSDRVRFRED;
+
+	ret = of_property_read_u32(np, "st,trim-hs-current", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < CUR_MAX)
+			usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKITRM, val);
+		else
+			dev_warn(usbphyc->dev, "phy%d: invalid st,trim-hs-current\n", index);
+	}
+
+	ret = of_property_read_u32(np, "st,trim-hs-impedance", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < IMP_MAX)
+			usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKZTRM, val);
+		else
+			dev_warn(usbphyc->dev, "phy%d: invalid st,trim-hs-impedance\n", index);
+	}
+
+	ret = of_property_read_u32(np, "st,tune-squelch-level", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < SQLCH_MAX)
+			usbphyc_phy->tune |= FIELD_PREP(SQLCHCTL, val);
+		else
+			dev_warn(usbphyc->dev, "phy%d: invalid st,tune-squelch\n", index);
+	}
+
+	if (of_property_read_bool(np, "st,enable-hs-rx-gain-eq"))
+		usbphyc_phy->tune |= HDRXGNEQEN;
+
+	ret = of_property_read_u32(np, "st,tune-hs-rx-offset", &val);
+	if (ret != -EINVAL) {
+		if (!ret && val < RX_OFFSET_MAX)
+			usbphyc_phy->tune |= FIELD_PREP(HSRXOFF, val);
+		else
+			dev_warn(usbphyc->dev, "phy%d: invalid st,tune-hs-rx-offset\n", index);
+	}
+
+	if (of_property_read_bool(np, "st,no-hs-ftime-ctrl"))
+		usbphyc_phy->tune |= HSFALLPREEM;
+
+	if (!of_property_read_bool(np, "st,no-lsfs-sc"))
+		usbphyc_phy->tune |= SHTCCTCTLPROT;
+
+	if (of_property_read_bool(np, "st,enable-hs-tx-staggering"))
+		usbphyc_phy->tune |= STAGSEL;
+
+	/* Restore OTP compensation code */
+	usbphyc_phy->tune |= FIELD_PREP(OTPCOMP, otpcomp);
+
+	/*
+	 * By default, if no st,xxx tuning property is used, usbphyc_phy->tune is equal to
+	 * STM32_USBPHYC_TUNE reset value (LFSCAPEN | SHTCCTCTLPROT | OTPCOMP).
+	 */
+	writel_relaxed(usbphyc_phy->tune, usbphyc->base + reg);
+}
+
 static void stm32_usbphyc_switch_setup(struct stm32_usbphyc *usbphyc,
 				       u32 utmi_switch)
 {
@@ -550,6 +731,9 @@ static int stm32_usbphyc_probe(struct platform_device *pdev)
 			usbphyc->phys[port]->vbus = NULL;
 		}
 
+		/* Configure phy tuning */
+		stm32_usbphyc_phy_tuning(usbphyc, child, index);
+
 		port++;
 	}
 
@@ -601,10 +785,17 @@ static int stm32_usbphyc_remove(struct platform_device *pdev)
 static int __maybe_unused stm32_usbphyc_resume(struct device *dev)
 {
 	struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev);
+	struct stm32_usbphyc_phy *usbphyc_phy;
+	int port;
 
 	if (usbphyc->switch_setup >= 0)
 		stm32_usbphyc_switch_setup(usbphyc, usbphyc->switch_setup);
 
+	for (port = 0; port < usbphyc->nphys; port++) {
+		usbphyc_phy = usbphyc->phys[port];
+		writel_relaxed(usbphyc_phy->tune, usbphyc->base + STM32_USBPHYC_TUNE(port));
+	}
+
 	return 0;
 }
 
-- 
2.25.1


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-05 15:24 ` [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties Amelie Delaunay
@ 2021-10-05 22:45   ` Rob Herring
  2021-10-06  6:51     ` Amelie DELAUNAY
  2021-10-14 17:26   ` Rob Herring
  1 sibling, 1 reply; 11+ messages in thread
From: Rob Herring @ 2021-10-05 22:45 UTC (permalink / raw)
  To: Amelie Delaunay
  Cc: linux-stm32, Rob Herring, linux-arm-kernel, linux-phy,
	Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree

On Tue, 05 Oct 2021 17:24:52 +0200, Amelie Delaunay wrote:
> This patch adds the description of new optional phy tuning properties
> for usbphyc phy sub nodes.
> 
> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> ---
> Changes in v2:
> - st,phy-tuning property removed
> - tuning properties are now put directly in each child node
> - tuning properties are no more free form text and their name reworked
> ---
>  .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 ++++++++++++++++++
>  1 file changed, 126 insertions(+)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1536730


usbphyc@5a006000: usb-phy@0: 'phy-supply' is a required property
	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
	arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
	arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml

usbphyc@5a006000: usb-phy@1: 'phy-supply' is a required property
	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
	arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
	arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-05 22:45   ` Rob Herring
@ 2021-10-06  6:51     ` Amelie DELAUNAY
  2021-10-06 12:38       ` Rob Herring
  0 siblings, 1 reply; 11+ messages in thread
From: Amelie DELAUNAY @ 2021-10-06  6:51 UTC (permalink / raw)
  To: Rob Herring
  Cc: linux-stm32, Rob Herring, linux-arm-kernel, linux-phy,
	Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree

Hi Rob,

On 10/6/21 12:45 AM, Rob Herring wrote:
> On Tue, 05 Oct 2021 17:24:52 +0200, Amelie Delaunay wrote:
>> This patch adds the description of new optional phy tuning properties
>> for usbphyc phy sub nodes.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
>> ---
>> Changes in v2:
>> - st,phy-tuning property removed
>> - tuning properties are now put directly in each child node
>> - tuning properties are no more free form text and their name reworked
>> ---
>>   .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 ++++++++++++++++++
>>   1 file changed, 126 insertions(+)
>>
> 
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
> 
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
> 
> Full log is available here: https://patchwork.ozlabs.org/patch/1536730
> 
> 
> usbphyc@5a006000: usb-phy@0: 'phy-supply' is a required property
> 	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
> 	arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
> 	arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml
> 
> usbphyc@5a006000: usb-phy@1: 'phy-supply' is a required property
> 	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
> 	arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
> 	arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
> 	arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml
> 

These warnings are due to the fact that usbphyc parent node is disabled 
in parent device tree (stm32mp151.dtsi) but not the "usb-phy" child 
nodes. These warnings are not introduced by this current patch "optional 
phy tuning properties" but anyway. The device trees mentioned don't 
enable usbphyc, so they don't have to set phy-supply in usbphyc child nodes.

$ git diff arch/arm/boot/dts/stm32mp151.dtsi
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi 
b/arch/arm/boot/dts/stm32mp151.dtsi
index bd289bf5d269..abef8b6be40a 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1507,11 +1507,13 @@ usbphyc: usbphyc@5a006000 {
                         usbphyc_port0: usb-phy@0 {
                                 #phy-cells = <0>;
                                 reg = <0>;
+                               status = "disabled";
                         };

                         usbphyc_port1: usb-phy@1 {
                                 #phy-cells = <1>;
                                 reg = <1>;
+                               status = "disabled";
                         };
                 };

Disable child nodes while parent node is already disabled fixes the 
warning. But it means to add status = "okay"; in child nodes everywhere 
usbphyc is enabled.
Is it normal dtbs_check checks in child nodes when parent node is disabled?

Regards,
Amelie

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-06  6:51     ` Amelie DELAUNAY
@ 2021-10-06 12:38       ` Rob Herring
  2021-10-06 12:58         ` Amelie DELAUNAY
  0 siblings, 1 reply; 11+ messages in thread
From: Rob Herring @ 2021-10-06 12:38 UTC (permalink / raw)
  To: Amelie DELAUNAY
  Cc: moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel,
	linux-phy, Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree

On Wed, Oct 6, 2021 at 1:51 AM Amelie DELAUNAY
<amelie.delaunay@foss.st.com> wrote:
>
> Hi Rob,
>
> On 10/6/21 12:45 AM, Rob Herring wrote:
> > On Tue, 05 Oct 2021 17:24:52 +0200, Amelie Delaunay wrote:
> >> This patch adds the description of new optional phy tuning properties
> >> for usbphyc phy sub nodes.
> >>
> >> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> >> ---
> >> Changes in v2:
> >> - st,phy-tuning property removed
> >> - tuning properties are now put directly in each child node
> >> - tuning properties are no more free form text and their name reworked
> >> ---
> >>   .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 ++++++++++++++++++
> >>   1 file changed, 126 insertions(+)
> >>
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/1536730
> >
> >
> > usbphyc@5a006000: usb-phy@0: 'phy-supply' is a required property
> >       arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
> >       arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
> >       arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml
> >
> > usbphyc@5a006000: usb-phy@1: 'phy-supply' is a required property
> >       arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dt.yaml
> >       arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dt.yaml
> >       arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
> >       arch/arm/boot/dts/stm32mp157c-odyssey.dt.yaml
> >
>
> These warnings are due to the fact that usbphyc parent node is disabled
> in parent device tree (stm32mp151.dtsi) but not the "usb-phy" child
> nodes. These warnings are not introduced by this current patch "optional
> phy tuning properties" but anyway.

Yes, I said that may be the case.

> The device trees mentioned don't
> enable usbphyc, so they don't have to set phy-supply in usbphyc child nodes.
>
> $ git diff arch/arm/boot/dts/stm32mp151.dtsi
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi
> b/arch/arm/boot/dts/stm32mp151.dtsi
> index bd289bf5d269..abef8b6be40a 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -1507,11 +1507,13 @@ usbphyc: usbphyc@5a006000 {
>                          usbphyc_port0: usb-phy@0 {
>                                  #phy-cells = <0>;
>                                  reg = <0>;
> +                               status = "disabled";
>                          };
>
>                          usbphyc_port1: usb-phy@1 {
>                                  #phy-cells = <1>;
>                                  reg = <1>;
> +                               status = "disabled";
>                          };
>                  };
>
> Disable child nodes while parent node is already disabled fixes the
> warning. But it means to add status = "okay"; in child nodes everywhere
> usbphyc is enabled.

Presumably, you already have to add phy-supply everywhere.

> Is it normal dtbs_check checks in child nodes when parent node is disabled?

I'll look into doing that.

Rob

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-06 12:38       ` Rob Herring
@ 2021-10-06 12:58         ` Amelie DELAUNAY
  2021-10-14 18:16           ` Rob Herring
  0 siblings, 1 reply; 11+ messages in thread
From: Amelie DELAUNAY @ 2021-10-06 12:58 UTC (permalink / raw)
  To: Rob Herring
  Cc: moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel,
	linux-phy, Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree



On 10/6/21 2:38 PM, Rob Herring wrote:
>> Disable child nodes while parent node is already disabled fixes the
>> warning. But it means to add status = "okay"; in child nodes everywhere
>> usbphyc is enabled.
> Presumably, you already have to add phy-supply everywhere.
>  >> Is it normal dtbs_check checks in child nodes when parent node is 
disabled?
> I'll look into doing that.

Should I wait for your potential dtbs_check update or should I disable 
child nodes in .dtsi (and enable them along with parent node in .dts 
using usbphyc) ?

Regards,
Amelie

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-05 15:24 ` [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties Amelie Delaunay
  2021-10-05 22:45   ` Rob Herring
@ 2021-10-14 17:26   ` Rob Herring
  1 sibling, 0 replies; 11+ messages in thread
From: Rob Herring @ 2021-10-14 17:26 UTC (permalink / raw)
  To: Amelie Delaunay
  Cc: Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	Maxime Coquelin, linux-phy, linux-kernel, devicetree,
	linux-arm-kernel, linux-stm32

On Tue, Oct 05, 2021 at 05:24:52PM +0200, Amelie Delaunay wrote:
> This patch adds the description of new optional phy tuning properties
> for usbphyc phy sub nodes.
> 
> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> ---
> Changes in v2:
> - st,phy-tuning property removed
> - tuning properties are now put directly in each child node
> - tuning properties are no more free form text and their name reworked
> ---
>  .../bindings/phy/phy-stm32-usbphyc.yaml       | 126 ++++++++++++++++++
>  1 file changed, 126 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
> index 3329f1d33a4f..c0f4dff2b8cb 100644
> --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
> @@ -81,6 +81,116 @@ patternProperties:
>          properties:
>            vbus-supply: true
>  
> +      # It can be necessary to adjust the PHY settings to compensate parasitics, which can be due
> +      # to USB connector/receptacle, routing, ESD protection component,... Here is the list of
> +      # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
> +      # Speed, LS for Low-Speed)
> +
> +      st,current-boost-milliamp:

Not a documented unit. Use '-microamp'.

> +        description: Current boosting in mA
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 1
> +        maximum: 2
> +
> +      st,no-lsfs-fb-cap:
> +        description: Disables the LS/FS feedback capacitor
> +        type: boolean
> +
> +      st,decrease-hs-slew-rate:
> +        description: Decreases the HS driver slew rate by 10%
> +        type: boolean
> +
> +      st,tune-hs-dc-level:
> +        description: Tunes the HS driver DC level

You need '|' after 'description:' to retain the formatting you have 
here.

> +          - <0> normal level
> +          - <1> increases the level by 5 to 7 mV
> +          - <2> increases the level by 10 to 14 mV
> +          - <3> decreases the level by 5 to 7 mV
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 0
> +        maximum: 3
> +        default: 0
> +
> +      st,enable-fs-rftime-tuning:
> +        description: Enables the FS rise/fall tuning option
> +        type: boolean
> +
> +      st,enable-hs-rftime-reduction:
> +        description: Enables the HS rise/fall reduction feature
> +        type: boolean
> +
> +      st,trim-hs-current:
> +        description: Controls HS driver current trimming for choke compensation
> +          - <0> = 18.87 mA target current / nominal + 0%
> +          - <1> = 19.165 mA target current / nominal + 1.56%
> +          - <2> = 19.46 mA target current / nominal + 3.12%
> +          - <3> = 19.755 mA target current / nominal + 4.68%
> +          - <4> = 20.05 mA target current / nominal + 6.24%
> +          - <5> = 20.345 mA target current / nominal + 7.8%
> +          - <6> = 20.64 mA target current / nominal + 9.36%
> +          - <7> = 20.935 mA target current / nominal + 10.92%
> +          - <8> = 21.23 mA target current / nominal + 12.48%
> +          - <9> = 21.525 mA target current / nominal + 14.04%
> +          - <10> = 21.82 mA target current / nominal + 15.6%
> +          - <11> = 22.115 mA target current / nominal + 17.16%
> +          - <12> = 22.458 mA target current / nominal + 19.01%
> +          - <13> = 22.755 mA target current / nominal + 20.58%
> +          - <14> = 23.052 mA target current / nominal + 22.16%
> +          - <15> = 23.348 mA target current / nominal + 23.73%
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 0
> +        maximum: 15
> +        default: 0
> +
> +      st,trim-hs-impedance:
> +        description: Controls HS driver impedance tuning for choke compensation
> +          - <0> = no impedance offset
> +          - <1> = reduce the impedance by 2 ohms
> +          - <2> = reduce the impedance by 4 ohms
> +          - <3> = reduce the impedance by 6 ohms
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 0
> +        maximum: 3
> +        default: 0
> +
> +      st,tune-squelch-level:
> +        description: Tunes the squelch DC threshold value
> +          - <0> = no shift in threshold
> +          - <1> = threshold shift by +7 mV
> +          - <2> = threshold shift by -5 mV
> +          - <3> = threshold shift by +14 mV
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 0
> +        maximum: 3
> +        default: 0
> +
> +      st,enable-hs-rx-gain-eq:
> +        description: Enables the HS Rx gain equalizer
> +        type: boolean
> +
> +      st,tune-hs-rx-offset:
> +        description: Adjusts the HS Rx offset
> +          - <0> = no offset
> +          - <1> = offset of +5 mV
> +          - <2> = offset of +10 mV
> +          - <3> = offset of -5 mV
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        minimum: 0
> +        maximum: 3
> +        default: 0
> +
> +      st,no-hs-ftime-ctrl:
> +        description: Disables the HS fall time control of single ended signals during pre-emphasis
> +        type: boolean
> +
> +      st,no-lsfs-sc:
> +        description: Disables the short circuit protection in LS/FS driver
> +        type: boolean
> +
> +      st,enable-hs-tx-staggering:
> +        description: Enables the basic staggering in HS Tx mode
> +        type: boolean
> +
>      allOf:
>        - if:
>            properties:
> @@ -137,6 +247,14 @@ examples:
>              reg = <0>;
>              phy-supply = <&vdd_usb>;
>              #phy-cells = <0>;
> +            st,tune-hs-dc-level = <2>;
> +            st,enable-fs-rftime-tuning;
> +            st,enable-hs-rftime-reduction;
> +            st,trim-hs-current = <15>;
> +            st,trim-hs-impedance = <1>;
> +            st,tune-squelch-level = <3>;
> +            st,tune-hs-rx-offset = <2>;
> +            st,no-lsfs-sc;
>              connector {
>                  compatible = "usb-a-connector";
>                  vbus-supply = <&vbus_sw>;
> @@ -147,6 +265,14 @@ examples:
>              reg = <1>;
>              phy-supply = <&vdd_usb>;
>              #phy-cells = <1>;
> +            st,tune-hs-dc-level = <2>;
> +            st,enable-fs-rftime-tuning;
> +            st,enable-hs-rftime-reduction;
> +            st,trim-hs-current = <15>;
> +            st,trim-hs-impedance = <1>;
> +            st,tune-squelch-level = <3>;
> +            st,tune-hs-rx-offset = <2>;
> +            st,no-lsfs-sc;
>          };
>      };
>  ...
> -- 
> 2.25.1
> 
> 

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-06 12:58         ` Amelie DELAUNAY
@ 2021-10-14 18:16           ` Rob Herring
  2021-10-15  9:10             ` Amelie DELAUNAY
  0 siblings, 1 reply; 11+ messages in thread
From: Rob Herring @ 2021-10-14 18:16 UTC (permalink / raw)
  To: Amelie DELAUNAY
  Cc: moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel,
	linux-phy, Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree

On Wed, Oct 06, 2021 at 02:58:21PM +0200, Amelie DELAUNAY wrote:
> 
> 
> On 10/6/21 2:38 PM, Rob Herring wrote:
> > > Disable child nodes while parent node is already disabled fixes the
> > > warning. But it means to add status = "okay"; in child nodes everywhere
> > > usbphyc is enabled.
> > Presumably, you already have to add phy-supply everywhere.
> >  >> Is it normal dtbs_check checks in child nodes when parent node is
> disabled?
> > I'll look into doing that.
> 
> Should I wait for your potential dtbs_check update or should I disable child
> nodes in .dtsi (and enable them along with parent node in .dts using
> usbphyc) ?

I pushed a fix to dt-validate for this.

Rob

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties
  2021-10-14 18:16           ` Rob Herring
@ 2021-10-15  9:10             ` Amelie DELAUNAY
  0 siblings, 0 replies; 11+ messages in thread
From: Amelie DELAUNAY @ 2021-10-15  9:10 UTC (permalink / raw)
  To: Rob Herring
  Cc: moderated list:ARM/STM32 ARCHITECTURE, linux-arm-kernel,
	linux-phy, Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue,
	linux-kernel, Maxime Coquelin, devicetree


On 10/14/21 8:16 PM, Rob Herring wrote:
> On Wed, Oct 06, 2021 at 02:58:21PM +0200, Amelie DELAUNAY wrote:
>>
>>
>> On 10/6/21 2:38 PM, Rob Herring wrote:
>>>> Disable child nodes while parent node is already disabled fixes the
>>>> warning. But it means to add status = "okay"; in child nodes everywhere
>>>> usbphyc is enabled.
>>> Presumably, you already have to add phy-supply everywhere.
>>>   >> Is it normal dtbs_check checks in child nodes when parent node is
>> disabled?
>>> I'll look into doing that.
>>
>> Should I wait for your potential dtbs_check update or should I disable child
>> nodes in .dtsi (and enable them along with parent node in .dts using
>> usbphyc) ?
> 
> I pushed a fix to dt-validate for this.

Thanks!

Amelie

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2021-10-15  9:10 UTC | newest]

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2021-10-05 15:24 [PATCH v2 0/3] phy: stm32: add phy tuning support Amelie Delaunay
2021-10-05 15:24 ` [PATCH v2 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay
2021-10-05 15:24 ` [PATCH v2 2/3] dt-bindings: phy: phy-stm32-usbphyc: add optional phy tuning properties Amelie Delaunay
2021-10-05 22:45   ` Rob Herring
2021-10-06  6:51     ` Amelie DELAUNAY
2021-10-06 12:38       ` Rob Herring
2021-10-06 12:58         ` Amelie DELAUNAY
2021-10-14 18:16           ` Rob Herring
2021-10-15  9:10             ` Amelie DELAUNAY
2021-10-14 17:26   ` Rob Herring
2021-10-05 15:24 ` [PATCH v2 3/3] phy: stm32: add phy tuning support Amelie Delaunay

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