Re: [PATCH v1] net: phy: tja11xx: add TJA1102 support

[Marc Kleine-Budde <mkl@pengutronix.de>]

On 3/3/20 9:46 AM, Heiner Kallweit wrote:
> On 03.03.2020 08:37, Oleksij Rempel wrote:
>> TJA1102 is an dual T1 PHY chip. Both PHYs are separately addressable.
>> PHY 0 can be identified by PHY ID. PHY 1 has no PHY ID and can be
>> configured in device tree by setting compatible =
>> "ethernet-phy-id0180.dc81".
    ^^^^^^^^^^^^^^^^^^^^^^^^

> I'm not sure I understand what you're doing here. The two ports of the chip
> are separate PHY's on individual MDIO bus addresses?

Yes, Port 0 and Port 1 have seperate MFIO bus addresses, but only Port 0
has a proper phy_id (== PHY_ID_TJA1102), while Port 1 just has 0.

Currently we register Port 1 via the device tree compatible
"ethernet-phy-id0180.dc81".

> Reading the PHY ID registers here seems to repeat what phylib did already
> to populate phydev->phy_id. If port 1 has PHD ID 0 then the driver wouldn't
> bind and tja11xx_probe() would never be called (see phy_bus_match)

But we "force" it via the DT compatible. Another option would be to make
up a phyid for Port 1 and hope that it doesn't collide with a real phy
id in other or upcoming chips. But that sounds not like a clean solution
either.

Marc

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