From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: ARC-Seal: i=1; a=rsa-sha256; t=1524235635; cv=none; d=google.com; s=arc-20160816; b=j6uutSsWN/bcuAf8iXg4P9yPdH5ymu+11BfY1ra3b7P86Nc0XSLcYyyod2P5YDr5gy OkvfMaJSS3zXVejjUJLPJzSvfLDiHvc4huztmxuCRJkksGg+KCXQnnoYK3WMgNiRztjN B3/hXiUb/ZOG55serDM12df34RlcQK4Gu6kgGutt/iNBOJtgW9rmZtjadBooW3+wz9NK Vr3Hlnk1Q5wIbWWtZLuaBb7csmudgnJUhsbydBxpRgwf95FTrN7A1PCNeLvq9AyPclAr KH/GsFcvbORkDnsnEt85ysRbiFoHQWcQg0dZO0W1F9VyXyHASrNhSJaXzq01AhuLgApn hNuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=20T1LIE4xHnOQJs8PkS2Gf1T7CshVGtPobNfkfdKdfA=; b=TIFZwdGqhUYUFiBhoD62Bum7m5FXp/XVJqMv9FHFg6p2QfYnzXD4n17uuccIDm5GZb cTXNDB8aocV4cKqP12DqxxfqRf4bw5O2vTKW3MOOLCm9THU1rtApdMQDv9Ui7LPmKLnO Br+W3w52srqF3o/TsnGrtkU+lDYZdUjuLsP8z0pQ0bjYwfeYct9W1MSXNqMSCvoK9vVO Wm1EiPe6oB2x0jN4e/AttCkRHJLRpx7bSAGT1kd/fpyGyIc2+BVFBOTJCAHDh/fzUmay WPGsbj/TNSsNkTf/hIT+m+mA8rFs/FxtvsZGVbd77OyAcpCP9KxksmbQBc8Qz0oKLHif kPGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=qJDTHkZ8; spf=pass (google.com: domain of andreyknvl@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=andreyknvl@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=qJDTHkZ8; spf=pass (google.com: domain of andreyknvl@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=andreyknvl@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com X-Google-Smtp-Source: AIpwx48d9/8Zkt2RzY1cqKRFHoqbgLUTxDkkfzZPPrD9rywBojL+qnUaAXrLoIOAL4NR/BPzo5/dQA== From: Andrey Konovalov To: Andrey Ryabinin , Alexander Potapenko , Dmitry Vyukov , Jonathan Corbet , Catalin Marinas , Will Deacon , Marc Zyngier , Christopher Li , Christoph Lameter , Pekka Enberg , David Rientjes , Joonsoo Kim , Andrew Morton , Masahiro Yamada , Michal Marek , "GitAuthor : Andrey Konovalov" , Mark Rutland , Ard Biesheuvel , Yury Norov , Nick Desaulniers , Suzuki K Poulose , Kristina Martsenko , Punit Agrawal , Dave Martin , Michael Weiser , James Morse , Julien Thierry , Steve Capper , Tyler Baicar , "Eric W . Biederman" , Thomas Gleixner , Ingo Molnar , Paul Lawrence , Greg Kroah-Hartman , David Woodhouse , Sandipan Das , Kees Cook , Herbert Xu , Geert Uytterhoeven , Josh Poimboeuf , Arnd Bergmann , kasan-dev@googlegroups.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-sparse@vger.kernel.org, linux-mm@kvack.org, linux-kbuild@vger.kernel.org Cc: Kostya Serebryany , Evgeniy Stepanov , Lee Smith , Ramana Radhakrishnan , Jacob Bramley , Ruben Ayrapetyan , Kees Cook , Jann Horn , Mark Brand Subject: [RFC PATCH v3 08/15] khwasan, arm64: enable top byte ignore for the kernel Date: Fri, 20 Apr 2018 16:46:46 +0200 Message-Id: <37ddbe423f5fe8ce7b11fd7eb91f5fa88a96b9a8.1524235387.git.andreyknvl@google.com> X-Mailer: git-send-email 2.17.0.484.g0c8726318c-goog In-Reply-To: References: In-Reply-To: References: X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1598276905700241447?= X-GMAIL-MSGID: =?utf-8?q?1598276905700241447?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: KHWASAN uses the Top Byte Ignore feature of arm64 CPUs to store a pointer tag in the top byte of each pointer. This commit enables the TCR_TBI1 bit, which enables Top Byte Ignore for the kernel, when KHWASAN is used. Signed-off-by: Andrey Konovalov --- arch/arm64/include/asm/pgtable-hwdef.h | 1 + arch/arm64/mm/proc.S | 8 +++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index fd208eac9f2a..483aceedad76 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -289,6 +289,7 @@ #define TCR_A1 (UL(1) << 22) #define TCR_ASID16 (UL(1) << 36) #define TCR_TBI0 (UL(1) << 37) +#define TCR_TBI1 (UL(1) << 38) #define TCR_HA (UL(1) << 39) #define TCR_HD (UL(1) << 40) #define TCR_NFD1 (UL(1) << 54) diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 5f9a73a4452c..f3dfcd74a285 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -47,6 +47,12 @@ /* PTWs cacheable, inner/outer WBWA */ #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA +#ifdef CONFIG_KASAN_HW +#define TCR_KASAN_FLAGS TCR_TBI1 +#else +#define TCR_KASAN_FLAGS 0 +#endif + #define MAIR(attr, mt) ((attr) << ((mt) * 8)) /* @@ -439,7 +445,7 @@ ENTRY(__cpu_setup) */ ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \ TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ - TCR_TBI0 | TCR_A1 + TCR_TBI0 | TCR_A1 | TCR_KASAN_FLAGS tcr_set_idmap_t0sz x10, x9 /* -- 2.17.0.484.g0c8726318c-goog