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From: "Andreas Färber" <afaerber@suse.de>
To: Shawn Guo <shawnguo@kernel.org>, Krzysztof Kozlowski <krzk@kernel.org>
Cc: Chester Lin <clin@suse.com>, Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-serial@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Oleksij Rempel <linux@rempel-privat.de>,
	Stefan Riedmueller <s.riedmueller@phytec.de>,
	Matthias Schiffer <matthias.schiffer@ew.tq-group.com>,
	Li Yang <leoyang.li@nxp.com>, Fabio Estevam <festevam@gmail.com>,
	Matteo Lisi <matteo.lisi@engicam.com>,
	Frieder Schrempf <frieder.schrempf@kontron.de>,
	Tim Harvey <tharvey@gateworks.com>,
	Jagan Teki <jagan@amarulasolutions.com>,
	s32@nxp.com, catalin-dan.udma@nxp.com, bogdan.hamciuc@nxp.com,
	bogdan.folea@nxp.com, ciprianmarian.costea@nxp.com,
	radu-nicolae.pirea@nxp.com, ghennadi.procopciuc@nxp.com,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"Ivan T . Ivanov" <iivanov@suse.de>,
	"Lee, Chun-Yi" <jlee@suse.com>
Subject: Re: [PATCH 8/8] MAINTAINERS: Add an entry for NXP S32G2 boards
Date: Thu, 12 Aug 2021 17:30:38 +0200	[thread overview]
Message-ID: <3c65f75d-724f-a438-1e22-6baeb745a8e5@suse.de> (raw)
In-Reply-To: <20210809080346.GO30984@dragon>

Hello Shawn and Krzysztof,

On 09.08.21 10:03, Shawn Guo wrote:
> On Thu, Aug 05, 2021 at 09:49:51AM +0200, Krzysztof Kozlowski wrote:
>> On 05/08/2021 08:54, Chester Lin wrote:
>>> Add a new entry for the maintenance of NXP S32G2 DT files.
>>>
>>> Signed-off-by: Chester Lin <clin@suse.com>
>>> ---
>>>  MAINTAINERS | 6 ++++++
>>>  1 file changed, 6 insertions(+)
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 36aee8517ab0..3c6ba6cefd8f 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -2281,6 +2281,12 @@ F:	arch/arm/boot/dts/nuvoton-wpcm450*
>>>  F:	arch/arm/mach-npcm/wpcm450.c
>>>  F:	drivers/*/*wpcm*
>>>  
>>> +ARM/NXP S32G2 ARCHITECTURE

Suggestion from NXP is to use the broader S32G name.

>>> +M:	Chester Lin <clin@suse.com>
>>> +L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>>> +S:	Maintained
>>> +F:	arch/arm64/boot/dts/freescale/s32g2*
>>
>> I support the idea of sub-sub-architecture maintainers but I think idea
>> of in-file addresses was preferred:
>> https://lore.kernel.org/lkml/20200830122922.3884-1-shawnguo@kernel.org/

I had specifically asked Chester to add a MAINTAINERS section.

Is your apparent suggestion of not accepting this MAINTAINERS patch
based on the assumption that we're dealing with only one email address
in three files? What do you see as the threshold to warrant a section?

From my point of view, above MAINTAINERS entry is incomplete, as we
should CC the full team working on S32G for patch review, not just
Chester himself.
So that would in my mind have been additional R: and L: entries in that
MAINTAINERS section.

> Thanks for reminding that the patch didn't land.  I just resent it with
> your Reviewed-by tag added.  Thanks!

Your above patch does not make clear to me what syntax we should use for
adding email addresses to .dts[i] files now:

https://lore.kernel.org/lkml/20210809081033.GQ30984@dragon/

Especially when not dealing with file authors.

I get the impression it is not a replacement for an F: wildcard used in
MAINTAINERS, but rather a complement?

Please understand that this is not about a single .dts file, as your
patch suggests, but about a complete SoC family consisting of s32g*.dts*
as well as in the future drivers specific to this platform. It seems way
easier to specify the list of maintainers/reviewers in MAINTAINERS once
with suitable wildcard paths, than copying them into each and every
.dtsi and .dts file and driver .c/.h and later needing to sync multiple
places. If a bot or user has fixes or cleanups for the S32G code, we
want to know about it, so that NXP can consider it for their BSP
branches and SUSE for our SLE branches, and obviously for follow-up
patch series that are already in the works and waiting on this one.

Once merged, I would expect Chester or someone from NXP to set up an
S32G tree on kernel.org that gets integrated into linux-next and sends
pull requests to the SoC tree maintainers without bothering i.MX and
Layerscape maintainers. Did you handle that differently for S32V?

Thanks,
Andreas

P.S. Have you checked or considered whether your script change might
start to CC non-existing email addresses, since we wouldn't be allowed
to remove them from copyright or authorship statements to prevent that?

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

  reply	other threads:[~2021-08-12 15:30 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-05  6:54 [PATCH 0/8] arm64: dts: initial NXP S32G2 support Chester Lin
2021-08-05  6:54 ` [PATCH 1/8] dt-bindings: arm: fsl: add NXP S32G2 boards Chester Lin
2021-08-12 15:46   ` Andreas Färber
2021-08-13 17:49     ` Rob Herring
2021-08-13 17:53   ` Rob Herring
2021-08-18 14:34     ` Chester Lin
2021-09-06 20:38       ` Andreas Färber
2021-09-07  6:59         ` Krzysztof Kozlowski
2021-09-07  8:59           ` Andreas Färber
2021-09-06 19:35     ` Andreas Färber
2021-08-05  6:54 ` [PATCH 2/8] dt-bindings: serial: fsl-linflexuart: convert to json-schema format Chester Lin
2021-08-12 16:04   ` Andreas Färber
2021-08-13 11:11     ` Chester Lin
2021-08-13 11:28       ` Krzysztof Kozlowski
2021-08-13 11:43         ` Chester Lin
2021-08-13 18:04           ` Rob Herring
2021-08-13 18:07   ` Rob Herring
2021-08-05  6:54 ` [PATCH 3/8] dt-bindings: serial: fsl-linflexuart: Add compatible for S32G2 Chester Lin
2021-08-12 16:27   ` Andreas Färber
2021-08-13 14:27     ` Radu Nicolae Pirea (NXP OSS)
2021-08-13 18:11     ` Rob Herring
2021-08-13 18:09   ` Rob Herring
2021-08-05  6:54 ` [PATCH 4/8] arm64: dts: add NXP S32G2 support Chester Lin
2021-08-12 17:26   ` Andreas Färber
2021-08-13  3:28     ` Chester Lin
2021-08-13  7:05       ` Andreas Färber
2021-08-20 13:12     ` Marc Zyngier
2021-08-20 15:15       ` Chester Lin
2021-08-20 15:29         ` Marc Zyngier
2021-08-21 12:39           ` Chester Lin
2021-08-21 14:20             ` Marc Zyngier
2021-08-05  6:54 ` [PATCH 5/8] arm64: dts: s32g2: add serial/uart support Chester Lin
2021-08-12 17:42   ` Andreas Färber
2021-08-13  9:54     ` Radu Nicolae Pirea (NXP OSS)
2021-08-05  6:54 ` [PATCH 6/8] arm64: dts: s32g2: add VNP-EVB and VNP-RDB2 support Chester Lin
2021-08-12 18:00   ` Andreas Färber
2021-08-13  8:47     ` Chester Lin
2021-08-05  6:54 ` [PATCH 7/8] arm64: dts: s32g2: add memory nodes for evb and rdb2 Chester Lin
2021-08-12 18:25   ` Andreas Färber
2021-08-13 14:58     ` Chester Lin
2021-08-05  6:54 ` [PATCH 8/8] MAINTAINERS: Add an entry for NXP S32G2 boards Chester Lin
2021-08-05  7:49   ` Krzysztof Kozlowski
2021-08-09  8:03     ` Shawn Guo
2021-08-12 15:30       ` Andreas Färber [this message]
2021-08-12 15:54         ` Krzysztof Kozlowski
2021-08-09  8:06 ` [PATCH 0/8] arm64: dts: initial NXP S32G2 support Shawn Guo

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