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From: Marc Dietrich <marvin24@gmx.de>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
Marcel Ziswiler <marcel@ziswiler.com>,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 0/4] Restore ULPI USB on Tegra20
Date: Fri, 27 Apr 2018 14:30:41 +0200 [thread overview]
Message-ID: <4032338.O1BXeabcRj@ax5200p> (raw)
In-Reply-To: <20180426235818.10018-1-digetx@gmail.com>
Hi Dmitry,
Am Freitag, 27. April 2018, 01:58:14 CEST schrieb Dmitry Osipenko:
> Hello,
>
> This series of patches fixes ULPI USB on Tegra20. The original problem
> was reported by Marcel Ziswiler, he found that "ulpi-link" clock was
> incorrectly set to CDEV2 instead of PLL_P_OUT4. Marcel made a patch
> that changed the "ulpi-link" clock to PLL_P_OUT4 and that fixed issue
> with the USB for the devices that have CDEV2 being enabled by bootloader.
> The patch got into the kernel and later Marc Dietrich found that USB
> stopped working on the "paz00" Tegra20 board. After a bit of discussion
> was revealed that PLL_P_OUT4 is the parent clock of the CDEV2 and clock
> driver was setting CDEV2's parent incorrectly. The parent clock is actually
> determined by the pinmuxing config of CDEV2 pingroup. This patchset fixes
> the parent of CDEV2 clock by making Tegra's pinctrl driver a clock provider,
> providing CDEV1/2 clock muxes (thanks to Peter De Schrijver for the
> suggestion), and then setting these clock muxes as parents for the CDEV1/2
> clocks. In the end Marcel's CDEV2->PLL_P_OUT4 change is reverted since
> CDEV2 (aka MCLK2) is the actual clock source for "ulpi-link".
>
> Dmitry Osipenko (4):
> clk: tegra20: Add DEV1/DEV2 OSC dividers
> pinctrl: tegra20: Provide CDEV1/2 clock muxes
> clk: tegra20: Set correct parents for CDEV1/2 clocks
> ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
>
> arch/arm/boot/dts/tegra20.dtsi | 2 +-
> drivers/clk/tegra/clk-tegra20.c | 18 +++++++++++----
> drivers/pinctrl/tegra/pinctrl-tegra.c | 11 ---------
> drivers/pinctrl/tegra/pinctrl-tegra.h | 11 +++++++++
> drivers/pinctrl/tegra/pinctrl-tegra20.c | 30 ++++++++++++++++++++++++-
> 5 files changed, 55 insertions(+), 17 deletions(-)
Thanks for taking a look at this!
Series is:
Tested-by: Marc Dietrich <marvin24@gmx.de>
Marc
next prev parent reply other threads:[~2018-04-27 12:30 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-26 23:58 Dmitry Osipenko
2018-04-26 23:58 ` [PATCH v1 1/4] clk: tegra20: Add DEV1/DEV2 OSC dividers Dmitry Osipenko
2018-04-27 12:33 ` Marcel Ziswiler
2018-04-27 12:54 ` Dmitry Osipenko
2018-04-27 13:00 ` Marcel Ziswiler
2018-05-03 11:59 ` Dmitry Osipenko
2018-05-03 12:02 ` Dmitry Osipenko
2018-05-03 12:30 ` Marcel Ziswiler
2018-05-03 12:35 ` Dmitry Osipenko
2018-04-30 7:48 ` Peter De Schrijver
2018-04-26 23:58 ` [PATCH v1 2/4] pinctrl: tegra20: Provide CDEV1/2 clock muxes Dmitry Osipenko
2018-04-30 7:46 ` Peter De Schrijver
2018-05-02 12:32 ` Linus Walleij
2018-04-26 23:58 ` [PATCH v1 3/4] clk: tegra20: Set correct parents for CDEV1/2 clocks Dmitry Osipenko
2018-04-30 7:46 ` Peter De Schrijver
2018-05-01 21:31 ` Stephen Boyd
2018-04-26 23:58 ` [PATCH v1 4/4] ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20" Dmitry Osipenko
2018-04-27 12:30 ` Marc Dietrich [this message]
2018-04-30 9:48 ` [PATCH v1 0/4] Restore ULPI USB on Tegra20 Thierry Reding
2018-04-30 11:28 ` Thierry Reding
2018-05-01 21:30 ` Stephen Boyd
2018-05-02 12:58 ` Linus Walleij
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