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From: Mitch Bradley <wmb@firmworks.com>
To: Grant Likely <grant.likely@secretlab.ca>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	sodaville@linutronix.de, devicetree-discuss@lists.ozlabs.org,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
Date: Thu, 03 Feb 2011 11:32:45 -1000	[thread overview]
Message-ID: <4D4B1EFD.4060305@firmworks.com> (raw)
In-Reply-To: <20110203205928.GH6180@angua.secretlab.ca>

On 2/3/2011 10:59 AM, Grant Likely wrote:
> On Thu, Jan 27, 2011 at 02:41:47PM +0530, Sebastian Andrzej Siewior wrote:
>> * David Gibson | 2011-01-27 15:00:27 [+1000]:
>>>> +					>;
>>>> +
>>>> +				i2c-controller@15a00,0,0 {
>>>
>>> Uh.. that unit address does not look right.  The encoding of PCI
>>> 3-cell addresses into a unit address string is not simply comma
>>> separated cells.  I forget the details, so you'll need to check the OF
>>> PCI binding.
>>
>> Grant wrote [0]:
>> |You'll also note that I added ',0,0' to the end of the address.
>> |That's because the node address reflects the parent bus address format
>> |which uses 3 cells in this case.
>
> It is quite possible I was mistaken on this point.  The PCI binding is
> not my area of strength.


In real OF, the unit address of a PCI device is the first entry in the 
reg property, which is the config space address.  For the config space 
address, only the most significant of the three cells is significant; 
the other two must be 0.

The numerical representation of that cell in binary is 
0000.0000.0000.0000.dddd.dfff.0000.0000, where d is the device number on 
its bus segment and fff is the function number.

The text representation is "D,F" , where D is the hexadecimal ASCII 
representation of the binary number ddddd and F is the hexadecimal ASCII 
representation of the binary number fff .  So "show-devs" will display 
names like  "/pci/ethernet@12,e" - device number 0x12, function number 
0xe.

(In the general case, there are more fields in both the numerical and 
text representations, but the unit address usage is restricted to just 
the device and function numbers.  Bus numbers are handled by the 
hierarchy of PCI-to-PCI bridges.)

In real OF, there are "encode-unit" and "decode-unit" methods in the 
parent (PCI bus) node to convert between the numerical and text 
representations.

I don't know how this plays out in the flattened DT world, but the above 
is a summary of what the PCI bus binding stipulates.

>
> g.
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>

  reply	other threads:[~2011-02-03 21:42 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-01-24  4:28 Device tree on x86, part v3 Sebastian Andrzej Siewior
2011-01-24  4:28 ` [PATCH TIP 01/14] x86/e820: remove conditional early mapping in parse_e820_ext Sebastian Andrzej Siewior
2011-02-03 20:57   ` Grant Likely
2011-01-24  4:28 ` [PATCH TIP 02/14] x86: Add device tree support Sebastian Andrzej Siewior
2011-01-24  4:34   ` Sebastian Andrzej Siewior
2011-02-16 21:27     ` Grant Likely
2011-02-17 11:05       ` [sodaville] " Sebastian Andrzej Siewior
2011-02-16 21:26   ` Grant Likely
2011-02-17 11:03     ` Sebastian Andrzej Siewior
2011-02-16 21:31   ` Grant Likely
2011-02-17 11:31     ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 17:02       ` Grant Likely
2011-01-24  4:28 ` [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100 Sebastian Andrzej Siewior
2011-01-27  5:00   ` David Gibson
2011-01-27  9:11     ` Sebastian Andrzej Siewior
2011-02-03 20:59       ` Grant Likely
2011-02-03 21:32         ` Mitch Bradley [this message]
2011-02-04  9:40           ` Sebastian Andrzej Siewior
2011-02-02 18:58     ` [PATCH TIP v2 " Sebastian Andrzej Siewior
2011-02-03 21:07       ` Grant Likely
2011-02-04 10:06         ` Sebastian Andrzej Siewior
2011-02-16 21:44       ` Grant Likely
2011-02-22 11:21         ` [sodaville] " Sebastian Andrzej Siewior
2011-01-24  4:28 ` [PATCH TIP 04/14] x86/dtb: add irq domain abstraction Sebastian Andrzej Siewior
2011-01-24  4:28 ` [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC Sebastian Andrzej Siewior
2011-02-16 21:47   ` Grant Likely
2011-01-24  4:28 ` [PATCH TIP 06/14] x86/dtb: add support hpet Sebastian Andrzej Siewior
2011-01-24  4:28 ` [PATCH OF 07/14] of: move of_irq_map_pci() into generic code Sebastian Andrzej Siewior
2011-02-10 13:57   ` Michal Simek
2011-02-16 21:53   ` Grant Likely
2011-02-17  7:49     ` Michal Simek
2011-01-24  4:28 ` [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes Sebastian Andrzej Siewior
2011-02-16 21:59   ` Grant Likely
2011-02-22 11:21     ` [sodaville] " Sebastian Andrzej Siewior
2011-01-24  4:28 ` [PATCH TIP 09/14] x86/dtb: Add generic bus probe Sebastian Andrzej Siewior
2011-02-04 10:21   ` [PATCH v2 " Sebastian Andrzej Siewior
2011-02-16 22:04     ` Grant Likely
2011-01-24  4:28 ` [PATCH TIP 10/14] x86/ioapic: Add OF bindings for IO-APIC Sebastian Andrzej Siewior
2011-02-16 22:04   ` Grant Likely
2011-01-24  4:28 ` [PATCH TIP 11/14] x86/ce4100: use OF for ioapic Sebastian Andrzej Siewior
2011-01-24  4:29 ` [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob Sebastian Andrzej Siewior
2011-02-16 22:08   ` Grant Likely
2011-02-16 22:09   ` Grant Likely
2011-02-17 13:13     ` [sodaville] " Sebastian Andrzej Siewior
2011-01-24  4:29 ` [PATCH OF 13/14] rtc/cmos: add OF bindings Sebastian Andrzej Siewior
2011-01-24  4:38   ` Sebastian Andrzej Siewior
2011-02-16 22:11   ` Grant Likely
2011-02-17 13:26     ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 16:46       ` Grant Likely
2011-01-24  4:29 ` [PATCH TIP 14/14] x86/pci: remove warning Sebastian Andrzej Siewior

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