LKML Archive on lore.kernel.org
help / color / mirror / Atom feed
From: Mauro Carvalho Chehab <mchehab@redhat.com>
To: Borislav Petkov <bp@amd64.org>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Borislav Petkov <borislav.petkov@amd.com>
Subject: Re: [PATCH 05/30] amd64_edac: Cleanup chipselect handling
Date: Tue, 29 Mar 2011 11:56:26 -0300 [thread overview]
Message-ID: <4D91F31A.7040600@redhat.com> (raw)
In-Reply-To: <1297358133-14320-6-git-send-email-bp@amd64.org>
Em 10-02-2011 15:15, Borislav Petkov escreveu:
> From: Borislav Petkov <borislav.petkov@amd.com>
>
> Add a struct representing the DRAM chip select base/limit register
> pairs. Concentrate all CS handling in a single function. Also, add CS
> looping macros for cleaner, more readable code. While at it, adjust code
> to F15h. Finally, do smaller macro names cleanups (remove family names
> from register macros) and debug messages clarification.
>
> No functional change.
>
> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Hi Borislav,
> --- a/drivers/edac/amd64_edac.h
> +++ b/drivers/edac/amd64_edac.h
> @@ -160,6 +160,14 @@
> #define OFF false
>
> /*
> + * Create a contiguous bitmask starting at bit position @lo and ending at
> + * position @hi. For example
> + *
> + * GENMASK(21, 39) gives us the 64bit vector 0x000000ffffe00000.
> + */
> +#define GENMASK(lo, hi) (((1ULL << ((hi) - (lo) + 1)) - 1) << (lo))
> +
This is a nice macro that could be useful outside amd64. It is probably a good
idea to move it to include/linux/bitops.h.
Cheers,
Mauro.
next prev parent reply other threads:[~2011-03-29 14:56 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-10 17:15 [PATCH 00/30] amd64_edac: Add Bulldozer support Borislav Petkov
2011-02-10 17:15 ` [PATCH 01/30] EDAC: Shut up sysfs registration debug code Borislav Petkov
2011-02-10 17:15 ` [PATCH 02/30] amd64_edac: Add support for F15h DCT PCI config accesses Borislav Petkov
2011-02-10 17:15 ` [PATCH 03/30] amd64_edac: Remove DRAM base/limit subfields caching Borislav Petkov
2011-02-10 17:15 ` [PATCH 04/30] amd64_edac: Cleanup DHAR handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 05/30] amd64_edac: Cleanup chipselect handling Borislav Petkov
2011-03-29 14:56 ` Mauro Carvalho Chehab [this message]
2011-03-29 15:16 ` Borislav Petkov
2011-03-29 15:39 ` Mauro Carvalho Chehab
2011-03-29 16:02 ` Borislav Petkov
2011-03-29 17:32 ` Mauro Carvalho Chehab
2011-02-10 17:15 ` [PATCH 06/30] amd64_edac: Sanitize channel extraction Borislav Petkov
2011-02-10 17:15 ` [PATCH 07/30] amd64_edac: Sanitize f10_get_base_addr_offset Borislav Petkov
2011-02-10 17:15 ` [PATCH 08/30] amd64_edac: Replace huge bitmasks with a macro Borislav Petkov
2011-02-10 17:15 ` [PATCH 09/30] amd64_edac: Cleanup DBAM handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 10/30] amd64_edac: Cleanup Dram Configuration registers handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 11/30] amd64_edac: Cleanup DCT Select Low/High code Borislav Petkov
2011-02-10 17:15 ` [PATCH 12/30] amd64_edac: Cleanup NBCTL code Borislav Petkov
2011-02-10 17:15 ` [PATCH 13/30] amd64_edac: Cleanup NBCFG handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 14/30] amd64_edac: Cleanup NBSH cruft Borislav Petkov
2011-02-10 17:15 ` [PATCH 15/30] amd64_edac: Cleanup old defines cruft Borislav Petkov
2011-02-10 17:15 ` [PATCH 16/30] amd64_edac: Adjust channel counting to F15h Borislav Petkov
2011-02-10 17:15 ` [PATCH 17/30] amd64_edac: Simplify decoding path Borislav Petkov
2011-02-10 17:15 ` [PATCH 18/30] amd64_edac: Unify get_error_address Borislav Petkov
2011-02-10 17:15 ` [PATCH 19/30] amd64_edac: Add support for interleaved region swapping Borislav Petkov
2011-02-10 17:15 ` [PATCH 20/30] amd64_edac: Correct node interleaving removal Borislav Petkov
2011-02-10 17:15 ` [PATCH 21/30] amd64_edac: Fix channel interleave removal Borislav Petkov
2011-02-10 17:15 ` [PATCH 22/30] amd64_edac: Revamp online spare handling Borislav Petkov
2011-02-10 17:15 ` [PATCH 23/30] amd64_edac: Beef up early exit reporting Borislav Petkov
2011-02-10 17:15 ` [PATCH 24/30] amd64_edac: Adjust sys_addr to chip select conversion routine to F15h Borislav Petkov
2011-02-10 17:15 ` [PATCH 25/30] amd64_edac: Sanitize ->read_dram_ctl_register Borislav Petkov
2011-02-10 17:15 ` [PATCH 26/30] amd64_edac: Improve DRAM address mapping Borislav Petkov
2011-02-10 17:15 ` [PATCH 27/30] PCI: Rename CPU PCI id define Borislav Petkov
2011-02-10 17:15 ` [PATCH 28/30] amd64_edac: Simplify scrubrate setting Borislav Petkov
2011-02-10 17:15 ` [PATCH 29/30] amd64_edac: Adjust ECC symbol size to F15h Borislav Petkov
2011-02-10 17:15 ` [PATCH 30/30] amd64_edac: Enable driver on F15h Borislav Petkov
2011-02-10 18:56 ` [PATCH 00/30] amd64_edac: Add Bulldozer support Greg KH
2011-02-10 19:20 ` Borislav Petkov
2011-02-10 19:22 ` Jesse Barnes
2011-02-10 21:43 ` Borislav Petkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4D91F31A.7040600@redhat.com \
--to=mchehab@redhat.com \
--cc=borislav.petkov@amd.com \
--cc=bp@amd64.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--subject='Re: [PATCH 05/30] amd64_edac: Cleanup chipselect handling' \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).