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From: "Li, Aubrey" <aubrey.li@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: x86@kernel.org, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	"Kumar P, Mahesh" <mahesh.kumar.p@intel.com>,
	linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org
Subject: Re: [PATCH v2 4/4] PMC driver: Add Cherrytrail PMC interface
Date: Mon, 26 Jan 2015 10:30:42 +0800	[thread overview]
Message-ID: <54C5A6D2.5000005@linux.intel.com> (raw)
In-Reply-To: <1421918770.31903.111.camel@linux.intel.com>

On 2015/1/22 17:26, Andy Shevchenko wrote:
> On Thu, 2015-01-22 at 12:02 +0800, Li, Aubrey wrote:
>> On 2015/1/21 5:50, Andy Shevchenko wrote:
>>> The patch adds CHT PMC interface. This exposes all the South IP device power
>>> states and S0ix states for CHT. The bit map of FUNC_DIS and D3_STS_0 registers
>>> for SoCs are consistent. The D3_STS_1 and FUNC_DIS_2 registers, however, are
>>> not aligned. This is fixed by splitting a common mapping on per register basis.
>>>
>> Should we define the bit map table completely separate for different
>> platforms? My concern is, when D3_STS_0 and FUNC_DIS becomes not
>> consistent in a new SoC, the implementation in this patch has to be
>> rewritten completely.
>>
>> Defining entire bit map table for different platform introduces
>> reduplicated bit definitions, but when we add a new platform in future,
>> we don't need to consider the existing platforms definition, and no need
>> to change code structure any longer.
>>
>> Thoughts?
>>
> 
> But this what I did by introducing pmc_reg_map structure per SoC.
> You may or may not use previous definitions.
> 
okay, it makes sense to me.

Thanks,
-Aubrey


  reply	other threads:[~2015-01-26  2:30 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-20 21:49 [PATCH v2 0/4] x86: pmc_atom: Add Cherrytrail support Andy Shevchenko
2015-01-20 21:50 ` [PATCH v2 1/4] x86: pmc_atom: save struct device pointer in pmc Andy Shevchenko
2015-01-22  3:42   ` Li, Aubrey
2015-01-22  9:29     ` Andy Shevchenko
2015-01-20 21:50 ` [PATCH v2 2/4] x86: pmc_atom: print index of device in loop Andy Shevchenko
2015-01-22  3:45   ` Li, Aubrey
2015-01-22  9:40     ` Andy Shevchenko
2015-01-20 21:50 ` [PATCH v2 3/4] x86: pmc_atom: supply register mappings via pmc object Andy Shevchenko
2015-01-20 21:50 ` [PATCH v2 4/4] PMC driver: Add Cherrytrail PMC interface Andy Shevchenko
2015-01-22  4:02   ` Li, Aubrey
2015-01-22  9:26     ` Andy Shevchenko
2015-01-26  2:30       ` Li, Aubrey [this message]
2015-02-23 12:45 ` [PATCH v2 0/4] x86: pmc_atom: Add Cherrytrail support Andy Shevchenko
2015-03-02  6:26   ` Li, Aubrey
2015-03-03  3:37   ` Li, Aubrey
2015-03-04 10:44     ` Andy Shevchenko
2015-03-30 13:05   ` Shevchenko, Andriy
2015-03-31 10:59     ` Ingo Molnar

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