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From: Marc Zyngier <marc.zyngier@arm.com>
To: Stefan Agner <stefan@agner.ch>, Thomas Gleixner <tglx@linutronix.de>
Cc: "jason@lakedaemon.net" <jason@lakedaemon.net>,
	"u.kleine-koenig@pengutronix.de" <u.kleine-koenig@pengutronix.de>,
	"shawn.guo@linaro.org" <shawn.guo@linaro.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	Pawel Moll <Pawel.Moll@arm.com>,
	Mark Rutland <Mark.Rutland@arm.com>,
	"ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
	"galak@codeaurora.org" <galak@codeaurora.org>,
	"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH RESEND v3 0/3] irqchip: vf610-mscm: add support for MSCM interrupt router
Date: Mon, 26 Jan 2015 12:51:34 +0000	[thread overview]
Message-ID: <54C63856.7010704@arm.com> (raw)
In-Reply-To: <36990c90fa3d2ee0849227f31cbafb54@agner.ch>

On 26/01/15 11:55, Stefan Agner wrote:
> On 2015-01-26 11:16, Thomas Gleixner wrote:
>> On Thu, 15 Jan 2015, Stefan Agner wrote:
>>
>>> Splitted out version of the MSCM driver. My first driver based on the
>>> routeable domain support and was part of the Vybrid Cortex-M4 support
>>> patchset.
>>>
>>> So far the MSCM interrupt router was initialized by the boot loader
>>> and configured all interrupts for the Cortex-A5 CPU. There are two
>>> use cases where a proper driver is necessary:
>>> - To run Linux on the Cortex-M4. When the kernel is running on the
>>>   non-preconfigured CPU, the interrupt router need to be configured
>>>   properly.
>>> - To support deeper sleep modes: LPSTOP clears the interrupt router
>>>   configuration, hence a driver needs to restore the configuration
>>>   on resume.
>>> I created a seperate patchset for that driver which hopefully makes
>>> it easier to get it into mergeable state.
>>>
>>> Since I identified some registers likely to be used by other drivers
>>> (e.g. CPU ID or the CPU Generate Interrupt Register) I also added
>>> the "syscon" compatible string to make the registers available for
>>> other drivers in case needed.
>>>
>>> This resend version of this patchset is rebased on v3.19-rc4.
>>
>> Has the discussion with Marc on the original V3 set been resolved?
> 
> There was no answer to the original v3 patch. The comments of Marc was
> back in the v2 set, and has been resolved in v3. However, no Ack from
> Marc so far.

That's just me being lazy ;-). For the series:

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2015-01-26 12:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-15  8:04 Stefan Agner
2015-01-15  8:04 ` [PATCH RESEND v3 1/3] " Stefan Agner
2015-01-15  8:04 ` [PATCH RESEND v3 2/3] irqchip: vf610-mscm: dt-bindings: add MSCM bindings Stefan Agner
2015-01-26 13:36   ` Mark Rutland
2015-01-26 14:18     ` Stefan Agner
2015-01-28 10:31       ` Stefan Agner
2015-01-15  8:04 ` [PATCH RESEND v3 3/3] ARM: dts: vf610: add Miscellaneous System Control Module (MSCM) Stefan Agner
2015-01-26 10:16 ` [PATCH RESEND v3 0/3] irqchip: vf610-mscm: add support for MSCM interrupt router Thomas Gleixner
2015-01-26 11:55   ` Stefan Agner
2015-01-26 12:51     ` Marc Zyngier [this message]
2015-01-26 13:40     ` Mark Rutland

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