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From: Lars-Peter Clausen <lars@metafoo.de>
To: Peter Rosin <peda@lysator.liu.se>, alsa-devel@alsa-project.org
Cc: Takashi Iwai <tiwai@suse.de>,
	linux-kernel@vger.kernel.org, Mark Brown <broonie@linaro.org>,
	Peter Rosin <peda@axentia.se>
Subject: Re: [alsa-devel] [PATCH 1/7] ALSA: pcm: Add snd_interval_ranges() and snd_pcm_hw_constraint_ranges()
Date: Mon, 26 Jan 2015 23:10:43 +0100	[thread overview]
Message-ID: <54C6BB63.60809@metafoo.de> (raw)
In-Reply-To: <1421236370-19826-2-git-send-email-peda@lysator.liu.se>

On 01/14/2015 12:52 PM, Peter Rosin wrote:
> From: Peter Rosin <peda@axentia.se>
>
> Add helper functions to allow drivers to specify several disjoint
> ranges for a variable. In particular, there is a codec (PCM512x) that
> has a hole in its supported range of rates, due to PLL and divider
> restrictions.

Might be worth mentioning that this is the extension of 
snd_pcm_hw_constraint_list() from points to ranges. Otherwise looks good.

Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>


  reply	other threads:[~2015-01-26 22:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-14 11:52 [PATCH 0/7] ASoC: pcm512x: Clock master modes Peter Rosin
2015-01-14 11:52 ` [PATCH 1/7] ALSA: pcm: Add snd_interval_ranges() and snd_pcm_hw_constraint_ranges() Peter Rosin
2015-01-26 22:10   ` Lars-Peter Clausen [this message]
2015-01-14 11:52 ` [PATCH 2/7] ASoC: pcm512x: Fix spelling of register field names Peter Rosin
2015-01-14 11:52 ` [PATCH 3/7] ASoC: pcm512x: Change register default to match actual content after reset Peter Rosin
2015-01-14 11:52 ` [PATCH 4/7] ASoC: pcm512x: Support mastering BCLK/LRCLK without using the PLL Peter Rosin
2015-01-14 11:52 ` [PATCH 5/7] ASoC: pcm512x: Support mastering BCLK/LRCLK " Peter Rosin
2015-01-14 11:52 ` [PATCH 6/7] ASoC: pcm512x: Avoid the PLL for the DAC clock, if possible Peter Rosin
2015-01-14 11:52 ` [PATCH 7/7] ASoC: pcm512x: Support SND_SOC_DAIFMT_CBM_CFS Peter Rosin

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