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From: James Clark <james.clark@arm.com>
To: Leo Yan <leo.yan@linaro.org>, Mike Leach <mike.leach@linaro.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Coresight ML <coresight@lists.linaro.org>,
Al Grant <al.grant@arm.com>,
"Suzuki K. Poulose" <suzuki.poulose@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
John Garry <john.garry@huawei.com>, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-perf-users@vger.kernel.org
Subject: Re: [PATCH 3/6] perf cs-etm: Save TRCDEVARCH register
Date: Tue, 3 Aug 2021 13:33:01 +0100 [thread overview]
Message-ID: <6d1954d2-28bc-4b70-25fc-e74d63cc86cd@arm.com> (raw)
In-Reply-To: <20210731063731.GC7437@leoy-ThinkPad-X240s>
On 31/07/2021 07:37, Leo Yan wrote:
> I checked ETMv4.3 and ETMv4.4 spec (ARM IHI0064E for ETMv4.3 and ARM
> IHI0064F for ETMv4.4), both clarify ETMv4 has the register TRCDEVARCH;
> thus TRCDEVARCH is not a new register introduced by ETE.
>
> For this case, it's good to directly add a new field in the metadata
> array for recording register TRCDEVARCH.
This might be true, but the OpenCSD library doesn't take TRCDEVARCH as a config
parameter for ETMv4 so it couldn't be used. This is the struct:
typedef struct _ocsd_etmv4_cfg
{
uint32_t reg_idr0; /**< ID0 register */
uint32_t reg_idr1; /**< ID1 register */
uint32_t reg_idr2; /**< ID2 register */
uint32_t reg_idr8;
uint32_t reg_idr9;
uint32_t reg_idr10;
uint32_t reg_idr11;
uint32_t reg_idr12;
uint32_t reg_idr13;
uint32_t reg_configr; /**< Config Register */
uint32_t reg_traceidr; /**< Trace Stream ID register */
ocsd_arch_version_t arch_ver; /**< Architecture version */
ocsd_core_profile_t core_prof; /**< Core Profile */
} ocsd_etmv4_cfg;
And this is ETE where TRCDEVARCH is used:
typedef struct _ocsd_ete_cfg
{
uint32_t reg_idr0; /**< ID0 register */
uint32_t reg_idr1; /**< ID1 register */
uint32_t reg_idr2; /**< ID2 register */
uint32_t reg_idr8; /**< ID8 - maxspec */
uint32_t reg_devarch; /**< DevArch register */
uint32_t reg_configr; /**< Config Register */
uint32_t reg_traceidr; /**< Trace Stream ID register */
ocsd_arch_version_t arch_ver; /**< Architecture version */
ocsd_core_profile_t core_prof; /**< Core Profile */
} ocsd_ete_cfg;
Thanks
James
next prev parent reply other threads:[~2021-08-03 12:33 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 9:06 [PATCH 0/6] Support ETE decoding James Clark
2021-07-21 9:07 ` [PATCH 1/6] perf cs-etm: Refactor initialisation of decoder params James Clark
2021-07-31 5:48 ` Leo Yan
2021-07-21 9:07 ` [PATCH 2/6] perf cs-etm: Initialise architecture based on TRCIDR1 James Clark
2021-07-22 11:10 ` Mike Leach
2021-07-31 6:03 ` Leo Yan
2021-08-02 14:04 ` Mike Leach
2021-08-02 15:03 ` Leo Yan
2021-08-02 15:43 ` Mike Leach
2021-07-21 9:07 ` [PATCH 3/6] perf cs-etm: Save TRCDEVARCH register James Clark
2021-07-21 9:48 ` Mike Leach
2021-07-23 12:09 ` James Clark
2021-07-31 6:37 ` Leo Yan
2021-08-03 12:33 ` James Clark [this message]
2021-08-03 12:34 ` James Clark
2021-08-05 9:40 ` Leo Yan
2021-08-03 12:36 ` James Clark
2021-07-31 7:43 ` Leo Yan
2021-08-02 11:21 ` Mike Leach
2021-08-02 12:05 ` Leo Yan
2021-08-02 12:48 ` Mike Leach
2021-08-03 12:29 ` James Clark
2021-07-21 9:07 ` [PATCH 4/6] perf cs-etm: Update OpenCSD decoder for ETE James Clark
2021-07-31 6:50 ` Leo Yan
2021-07-21 9:07 ` [PATCH 5/6] perf cs-etm: Create ETE decoder James Clark
2021-07-31 7:23 ` Leo Yan
2021-08-03 13:09 ` James Clark
2021-08-05 10:59 ` Leo Yan
2021-07-21 9:07 ` [PATCH 6/6] perf cs-etm: Print the decoder name James Clark
2021-07-31 7:30 ` Leo Yan
2021-08-06 9:43 ` James Clark
2021-08-06 11:52 ` Leo Yan
2021-07-21 14:59 ` [PATCH 0/6] Support ETE decoding Mathieu Poirier
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