[PATCH 0/2] Adjust HiKey examples for kirin-pcie

[PATCH 0/2] Adjust HiKey examples for kirin-pcie

[Mauro Carvalho Chehab]

Rob,

As discussed on another thread, there are two issues at
pci/hisilicon,kirin-pcie.yaml:

- The bus-range parameters are causing warnings;
- The Kirin970 example doesn't reflect the right device
  hierarchy, causing some of_node files under sysfs to
  not be initialized.

This small series fix both.

Mauro Carvalho Chehab (2):
  dt-bindings: PCI: kirin: fix bus-range
  dt-bindings: PCI: kirin: fix HiKey970 example

 .../bindings   | 67 ++++++++++---------
 1 file changed, 37 insertions(+), 30 deletions(-)

-- 
2.31.1

[PATCH 1/2] dt-bindings: PCI: kirin: fix bus-range

[Mauro Carvalho Chehab]

Using bus-range = <0 1> causes a runtime warning:

            [    5.363450] pci_bus 0000:00: root bus resource [bus 00-01]
            [    5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
            [    5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff]

On Kirin 960, changing to bus-range = <0 0xff> produces a
cleaner log.

Kirin 970 is more complex, so better to just drop bus-range
as a hole.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 .../devicetree/bindings/pci/hisilicon,kirin-pcie.yaml          | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
index c0551d2e606d..d05deebe9dbb 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
@@ -66,7 +66,7 @@ examples:
               <0x0 0xf3f20000 0x0 0x40000>,
               <0x0 0xf5000000 0x0 0x2000>;
         reg-names = "dbi", "apb", "phy", "config";
-        bus-range = <0x0  0x1>;
+        bus-range = <0x0  0xff>;
         #address-cells = <3>;
         #size-cells = <2>;
         device_type = "pci";
@@ -97,7 +97,6 @@ examples:
               <0x0 0xfc180000 0x0 0x1000>,
               <0x0 0xf5000000 0x0 0x2000>;
         reg-names = "dbi", "apb", "config";
-        bus-range = <0x0  0x1>;
         msi-parent = <&its_pcie>;
         #address-cells = <3>;
         #size-cells = <2>;
-- 
2.31.1

[PATCH 2/2] dt-bindings: PCI: kirin: fix HiKey970 example

[Mauro Carvalho Chehab]

The given example doesn't produce all of_nodes at sysfs.
Update it to reflect what's actually working.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 .../bindings/pci/hisilicon,kirin-pcie.yaml    | 64 +++++++++++--------
 1 file changed, 36 insertions(+), 28 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
index d05deebe9dbb..668a09e27139 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
@@ -97,7 +97,6 @@ examples:
               <0x0 0xfc180000 0x0 0x1000>,
               <0x0 0xf5000000 0x0 0x2000>;
         reg-names = "dbi", "apb", "config";
-        msi-parent = <&its_pcie>;
         #address-cells = <3>;
         #size-cells = <2>;
         device_type = "pci";
@@ -116,43 +115,52 @@ examples:
                         <0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
         reset-gpios = <&gpio7 0 0>;
         hisilicon,clken-gpios = <&gpio27 3 0>, <&gpio17 0 0>, <&gpio20 6 0>;
-
-        pcie@0 { // Lane 0: PCIe switch: Bus 1, Device 0
-          reg = <0 0 0 0 0>;
+        pcie@0,0 { // Lane 0: PCIe switch: Bus 1, Device 0
+          reg = <0x80 0 0 0 0>;
           compatible = "pciclass,0604";
           device_type = "pci";
           #address-cells = <3>;
           #size-cells = <2>;
           ranges;
-          pcie@1,0 { // Lane 4: M.2
-            reg = <0x800 0 0 0 0>;
+          msi-parent = <&its_pcie>;
+
+          pcie@0,0 { // Lane 0: upstream
+            reg = <0 0 0 0 0>;
             compatible = "pciclass,0604";
             device_type = "pci";
-            reset-gpios = <&gpio3 1 0>;
-            clkreq-gpios = <&gpio27 3 0 >;
-            #address-cells = <3>;
-            #size-cells = <2>;
-            ranges;
-          };
-          pcie@5,0 { // Lane 5: Mini PCIe
-            reg = <0x2800 0 0 0 0>;
-            compatible = "pciclass,0604";
-            device_type = "pci";
-            reset-gpios = <&gpio27 4 0 >;
-            clkreq-gpios = <&gpio17 0 0 >;
-            #address-cells = <3>;
-            #size-cells = <2>;
-            ranges;
-          };
-          pcie@7,0 { // Lane 6: Ethernet
-            reg = <0x3800 0 0 0 0>;
-            compatible = "pciclass,0604";
-            device_type = "pci";
-            reset-gpios = <&gpio25 2 0 >;
-            clkreq-gpios = <&gpio20 6 0 >;
             #address-cells = <3>;
             #size-cells = <2>;
             ranges;
+
+            pcie@1,0 { // Lane 4: M.2
+              reg = <0x0800 0 0 0 0>;
+              compatible = "pciclass,0604";
+              device_type = "pci";
+              reset-gpios = <&gpio3 1 0>;
+              #address-cells = <3>;
+              #size-cells = <2>;
+              ranges;
+            };
+
+            pcie@5,0 { // Lane 5: Mini PCIe
+              reg = <0x2800 0 0 0 0>;
+              compatible = "pciclass,0604";
+              device_type = "pci";
+              reset-gpios = <&gpio27 4 0 >;
+              #address-cells = <3>;
+              #size-cells = <2>;
+              ranges;
+            };
+
+            pcie@7,0 { // Lane 6: Ethernet
+              reg = <0x03800 0 0 0 0>;
+              compatible = "pciclass,0604";
+              device_type = "pci";
+              reset-gpios = <&gpio25 2 0 >;
+              #address-cells = <3>;
+              #size-cells = <2>;
+              ranges;
+            };
           };
         };
       };
-- 
2.31.1

[PATCH 0/2] Fix examples at pci/hisilicon,kirin-pcie.yaml

[Mauro Carvalho Chehab]

Hi Rob,

This small series fix the HiKey960 and HiKey970 examples for the
DT schema defined at pci/hisilicon,kirin-pcie.yaml,

The first one fix bus-range for HiKey960. It is meant to suppress a
resource conflict warning when PCI probe happens. I sent a separate
patch to be applied by HiSilicon maintainers with the DTS change.

The second one fix the topology of the PCIe bridge found at
HiKey970. It matches the DTS file that I'll submit once everything
gets merged. With such DT schema, all of_node sysfs files should
be created, pointing to the right place. It also supresses the bus-range
warnings.

Please apply on your tree, as it depends on the other patches you
already merged there.

Thanks!
Mauro

Mauro Carvalho Chehab (2):
  dt-bindings: PCI: kirin: fix bus-range
  dt-bindings: PCI: kirin: fix HiKey970 example

 .../bindings/pci/hisilicon,kirin-pcie.yaml    | 67 ++++++++++---------
 1 file changed, 37 insertions(+), 30 deletions(-)

-- 
2.31.1

[PATCH 1/2] dt-bindings: PCI: kirin: fix bus-range

[Mauro Carvalho Chehab]

Using bus-range = <0 1> causes a runtime warning:

            [    5.363450] pci_bus 0000:00: root bus resource [bus 00-01]
            [    5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
            [    5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff]

On Kirin 960, changing to bus-range = <0 0xff> produces a
cleaner log.

Kirin 970 is more complex, so better to just drop bus-range
as a hole.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
 .../devicetree/bindings/pci/hisilicon,kirin-pcie.yaml          | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
index c0551d2e606d..d05deebe9dbb 100644
--- a/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
@@ -66,7 +66,7 @@ examples:
               <0x0 0xf3f20000 0x0 0x40000>,
               <0x0 0xf5000000 0x0 0x2000>;
         reg-names = "dbi", "apb", "phy", "config";
-        bus-range = <0x0  0x1>;
+        bus-range = <0x0  0xff>;
         #address-cells = <3>;
         #size-cells = <2>;
         device_type = "pci";
@@ -97,7 +97,6 @@ examples:
               <0x0 0xfc180000 0x0 0x1000>,
               <0x0 0xf5000000 0x0 0x2000>;
         reg-names = "dbi", "apb", "config";
-        bus-range = <0x0  0x1>;
         msi-parent = <&its_pcie>;
         #address-cells = <3>;
         #size-cells = <2>;
-- 
2.31.1