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From: Stefan Agner <stefan@agner.ch>
To: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Dmitry Osipenko <digetx@gmail.com>,
	dwmw2@infradead.org, computersforpeace@gmail.com,
	marek.vasut@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
	thierry.reding@gmail.com, dev@lynxeye.de,
	miquel.raynal@bootlin.com, richard@nod.at, marcel@ziswiler.com,
	krzk@kernel.org, benjamin.lindqvist@endian.se,
	jonathanh@nvidia.com, pdeschrijver@nvidia.com,
	pgaikwad@nvidia.com, mirza.krak@gmail.com,
	linux-mtd@lists.infradead.org, linux-tegra@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/6] mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver
Date: Sat, 09 Jun 2018 08:23:51 +0200	[thread overview]
Message-ID: <792ee71847f6f4752b8bcba65d22bf81@agner.ch> (raw)
In-Reply-To: <20180609075256.725354d6@bbrezillon>

On 09.06.2018 07:52, Boris Brezillon wrote:
> On Fri, 08 Jun 2018 23:51:01 +0200
> Stefan Agner <stefan@agner.ch> wrote:
> 
> 
>> >
>> > void tegra_nand_controller_reset(struct tegra_nand_controller *ctrl)
>> > {
>> > 	int err;
>> >
>> > 	disable_irq(ctrl->irq);
>> >
>> > 	err = reset_control_reset(ctrl->rst);
>> > 	if (err) {
>> > 		dev_err(ctrl->dev, "Failed to reset HW: %d\n", err);
>> > 		msleep(HW_TIMEOUT);
>> > 	}
>> >
>> > 	writel_relaxed(NAND_CMD_STATUS, ctrl->regs + HWSTATUS_CMD);
>> > 	writel_relaxed(HWSTATUS_MASK, ctrl->regs + HWSTATUS_MASK);
>> > 	writel_relaxed(INT_MASK, ctrl->regs + ISR);
>>
>> If we do a controller reset, there is much more state than that which
>> needs to be restored. A lot of it is not readily available currently
>> (timing, ECC settings...)
> 
> This is actually a good test to detect what is not properly initialized
> by the driver. Timings should be configured correctly through
> ->setup_data_interface(). ECC engine should be disabled by default and
> only enabled when ->{read,write}_page() is called.
> 

Is setup_data_interface guaranteed to be called after a failed
->exec_op()/{read,write}_page()?

>>
>> That seems a lot of work for a code path I do not intend to ever use :-)
>>
> 
> Not so sure it's a lot of work. If ECC and timing settings are the
> only thing you need to initialize then it should work just fine.
> Try with a controller reset and you'll know if you miss something ;-).

Currently the setting gets written directly to the registers. Only the
enable flag is set in the HW ECC {read,write}_page() functions. So I
will have to store the complete register in the chip structure and write
them on every {read,write}_page()?

--
Stefan

  reply	other threads:[~2018-06-09  6:24 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-31 22:16 [PATCH v3 0/6] mtd: rawnand: add NVIDIA Tegra NAND flash support Stefan Agner
2018-05-31 22:16 ` [PATCH v3 1/6] mtd: rawnand: add Reed-Solomon error correction algorithm Stefan Agner
2018-06-01  7:26   ` Boris Brezillon
2018-06-01  9:25     ` Boris Brezillon
2018-06-01 13:34       ` Stefan Agner
2018-06-01 13:43         ` Boris Brezillon
2018-05-31 22:16 ` [PATCH v3 2/6] mtd: rawnand: add an option to specify NAND chip as a boot device Stefan Agner
2018-06-01  7:26   ` Boris Brezillon
2018-06-05 20:11   ` Rob Herring
2018-06-06  7:28     ` Boris Brezillon
2018-05-31 22:16 ` [PATCH v3 3/6] mtd: rawnand: tegra: add devicetree binding Stefan Agner
2018-06-01  7:30   ` Boris Brezillon
2018-06-05 20:19     ` Dmitry Osipenko
2018-06-06 10:39       ` Thierry Reding
2018-06-06 10:45         ` Boris Brezillon
2018-06-06 11:07           ` Thierry Reding
2018-06-06 12:14             ` Stefan Agner
2018-06-06 12:31               ` Boris Brezillon
2018-06-05 20:13   ` Rob Herring
2018-05-31 22:16 ` [PATCH v3 4/6] mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver Stefan Agner
2018-06-01  9:20   ` Dmitry Osipenko
2018-06-08 21:51     ` Stefan Agner
2018-06-09  5:52       ` Boris Brezillon
2018-06-09  6:23         ` Stefan Agner [this message]
2018-06-09  6:41           ` Boris Brezillon
2018-06-09  6:46             ` Boris Brezillon
2018-06-09  6:55               ` Boris Brezillon
2018-06-09  6:51             ` Stefan Agner
2018-06-09 12:21       ` Dmitry Osipenko
2018-06-10 11:09         ` Stefan Agner
2018-06-10 15:00           ` Dmitry Osipenko
2018-06-10 15:32             ` Boris Brezillon
2018-06-11 11:45               ` Dmitry Osipenko
2018-06-11 11:50                 ` Boris Brezillon
2018-06-11 13:10                   ` Dmitry Osipenko
2018-06-04 17:16   ` Randolph Maaßen
2018-06-04 20:56     ` Stefan Agner
2018-06-09  5:55   ` Boris Brezillon
2018-06-09  7:18   ` Boris Brezillon
2018-05-31 22:16 ` [PATCH v3 5/6] ARM: dts: tegra: add Tegra20 NAND flash controller node Stefan Agner
2018-05-31 22:16 ` [PATCH v3 6/6] ARM: dts: tegra: enable NAND flash on Colibri T20 Stefan Agner

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