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From: Alexandre Torgue <>
To: Linus Walleij <>,
	Benjamin Gaignard <>
Cc: Maxime Coquelin <>,
	"" <>,
	"open list:GPIO SUBSYSTEM" <>,
	Linux ARM <>,
Subject: Re: [PATCH 0/2] pinctrl: stm32: add suspend/resume management
Date: Mon, 27 May 2019 18:17:20 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

Hi Linus

On 5/24/19 1:24 PM, Linus Walleij wrote:
> On Fri, May 10, 2019 at 9:42 AM Alexandre Torgue
> <> wrote:
>> During power sequence, GPIO hardware registers could be lost if the power
>> supply is switched off. Each device using pinctrl API is in charge of
>> managing pins during suspend/resume sequences. But for pins used as gpio or
>> irq stm32 pinctrl driver has to save the hardware configuration.
>> Each register will be saved at runtime and restored during resume sequence.
> Both patches applied.
> On the same pinctrl devel branch is also Benjamin's patches to support
> the "link_consumers" property on the pin controller descriptor to
> enable links from pin control consumers back to their pin controller
> suppliers, especially important for STMFX.
> Would you please check if it work fine if you turn on this feature
> for the SoC STM32 pin controller?

I just tested with Benjamin's patches and set "link_consumers" property 
for STM32 pinctrl. No changes on boot (except extra logs for each probe) 
and no changes on power tests too.


> I am working a bit on refining the patches, so I want to enable testing
> with some SoC pin controllers as well and possibly make the
> behavior default.
> Yours,
> Linus Walleij

      parent reply	other threads:[~2019-05-27 16:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10  7:42 Alexandre Torgue
2019-05-10  7:42 ` [PATCH 1/2] " Alexandre Torgue
2019-05-10  7:42 ` [PATCH 2/2] pinctrl: stm32: Enable suspend/resume for stm32mp157c SoC Alexandre Torgue
2019-05-24 11:24 ` [PATCH 0/2] pinctrl: stm32: add suspend/resume management Linus Walleij
2019-05-24 12:26   ` Alexandre Torgue
2019-05-27 16:17   ` Alexandre Torgue [this message]

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