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From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: bhelgaas@google.com, lorenzo.pieralisi@arm.com,
	Joao.Pinto@synopsys.com, jingoohan1@gmail.com, kishon@ti.com,
	robh+dt@kernel.org, mark.rutland@arm.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com
Subject: [PATCH v4 04/10] bindings: PCI: designware: Add support for the EP in Designware driver
Date: Mon, 16 Apr 2018 15:37:52 +0100	[thread overview]
Message-ID: <7d3445e3f8bb15d27987e0d061275d7d69f2c519.1523881182.git.gustavo.pimentel@synopsys.com> (raw)
In-Reply-To: <cover.1523881182.git.gustavo.pimentel@synopsys.com>
In-Reply-To: <cover.1523881182.git.gustavo.pimentel@synopsys.com>

Add device tree binding documentation for the Endpoint in PCIe Designware
driver.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
---
Change v1->v2:
 - Add a missing log description.
 - Add "snps,dw-pcie" compatible string following Kishon's suggestion.
Change v2->v3:
- Reverted pcie_ep name to pcie.
Changes v3->v4:
- Reverted "snps,dw-pcie-rc" compatible string requested by Rob Herring.

 Documentation/devicetree/bindings/pci/designware-pcie.txt | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 7f9804d..980fc9a 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -3,6 +3,7 @@
 Required properties:
 - compatible:
 	"snps,dw-pcie" for RC mode;
+	"snps,dw-pcie-ep" for EP mode;
 - reg: Should contain the configuration address space.
 - reg-names: Must be "config" for the PCIe configuration space.
     (The old way of getting the configuration address space from "ranges"
@@ -56,3 +57,15 @@ Example configuration:
 		#interrupt-cells = <1>;
 		num-lanes = <1>;
 	};
+or
+	pcie: pcie@dfc00000 {
+		compatible = "snps,dw-pcie-ep";
+		reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
+		      <0xdfc01000 0x0001000>, /* IP registers 2 */
+		      <0xd0000000 0x2000000>; /* Configuration space */
+		reg-names = "dbi", "dbi2", "addr_space";
+		device_type = "pci";
+		num-ib-windows = <6>;
+		num-ob-windows = <2>;
+		num-lanes = <1>;
+	};
-- 
2.7.4

  parent reply	other threads:[~2018-04-16 14:39 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-16 14:37 [PATCH v4 00/10] Designware EP support and code clean up Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 01/10] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-16 21:39   ` Rob Herring
2018-04-17 13:47     ` Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 02/10] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-17  9:17   ` Kishon Vijay Abraham I
2018-04-16 14:37 ` [PATCH v4 03/10] PCI: endpoint: functions/pci-epf-test: Add second entry Gustavo Pimentel
2018-04-17  9:19   ` Kishon Vijay Abraham I
2018-04-17  9:21     ` Kishon Vijay Abraham I
2018-04-16 14:37 ` Gustavo Pimentel [this message]
2018-04-16 21:43   ` [PATCH v4 04/10] bindings: PCI: designware: Add support for the EP in Designware driver Rob Herring
2018-04-17 13:33     ` Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 05/10] PCI: Adds device ID for Synopsys Sample Endpoint Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 06/10] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-17  9:22   ` Kishon Vijay Abraham I
2018-04-16 14:37 ` [PATCH v4 07/10] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 08/10] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 09/10] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-16 14:37 ` [PATCH v4 10/10] PCI: dwc: Replace magic number by defines Gustavo Pimentel

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