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From: Philipp Zabel <p.zabel@pengutronix.de>
To: Dorota Czaplejewicz <dorota.czaplejewicz@puri.sm>,
	Steve Longerbeam <slongerbeam@gmail.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-media@vger.kernel.org, linux-staging@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: kernel@puri.sm, phone-devel@vger.kernel.org
Subject: Re: [PATCH] media: imx: Round line size to 4 bytes
Date: Fri, 08 Oct 2021 14:19:41 +0200	[thread overview]
Message-ID: <7d61fdbd161fce40874766bde5f95c3b73f1a96d.camel@pengutronix.de> (raw)
In-Reply-To: <20211006110207.256325-1-dorota.czaplejewicz@puri.sm>

Hi Dorota,

On Wed, 2021-10-06 at 13:05 +0200, Dorota Czaplejewicz wrote:
> Section 13.7.6.13 "CSI Image Parameter Register" of the
> i.MX 8M Quad Applications Processors Reference Manual
> states that the line size should be divisible by 8 bytes.
> However, the hardware also accepts sizes divisible by 4 bytes.
> 
> This patch accepts line sizes divisible 4-bytes in non-planar mode.

Thank you, this makes it much clearer. I see two issues with this,
though, one small and one a bit bigger:

First, I'd be wary of disregarding the reference manual - unless we know
better, and then it should be well documented in the code. It might be
that the 8-byte alignment requirement stems from the fact that the FIFO
operates in double-word units, which might cause the CSI to write over
the end of the buffer if the line width is odd (in 32-bit words).
Or maybe it's just that the FBUF_STRIDE conflicts with this, I'm unclear
on whether that is only given in units of dwords (although the driver
currently doesn't support this anyway).

I wonder: if you use 4-byte aligned width and odd height, does the CSI
write over the end of the buffer?

> Signed-off-by: Dorota Czaplejewicz <dorota.czaplejewicz@puri.sm>
> ---
> 
> Hello,
> 
> my previous patch identified something that was not a problem,
> so I'm sending a different one.
> 
> This has been tested on the Librem 5.
> 
> Cheers,
> Dorota
> 
>  drivers/staging/media/imx/imx-media-utils.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c
> index 5128915a5d6f..a303003929e3 100644
> --- a/drivers/staging/media/imx/imx-media-utils.c
> +++ b/drivers/staging/media/imx/imx-media-utils.c
> @@ -545,13 +545,13 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix,
>  	}
>  
>  	/* Round up width for minimum burst size */
> -	width = round_up(mbus->width, 8);
> +	width = round_up(mbus->width, 4);
>  
>  	/* Round up stride for IDMAC line start address alignment */
>  	if (cc->planar)
>  		stride = round_up(width, 16);
>  	else
> -		stride = round_up((width * cc->bpp) >> 3, 8);
> +		stride = round_up((width * cc->bpp) >> 3, 4);

Second, even if this works fine on the i.MX7/8M CSI, the alignment is
still required for the i.MX5/6 IPU, for which this code and the comments
were written. So we need a way to differentiate the two cases here.

regards
Philipp

  reply	other threads:[~2021-10-08 12:20 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-06 11:05 Dorota Czaplejewicz
2021-10-08 12:19 ` Philipp Zabel [this message]
2021-10-13  9:26   ` Dorota Czaplejewicz
2021-10-14 11:26     ` Philipp Zabel
2021-10-17 11:07       ` Dorota Czaplejewicz
2021-10-18 10:21         ` Philipp Zabel

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